Abstract:
A method for transmission is provided to generate a plurality of reference signals for a plurality of antenna ports, with each reference signal corresponding to an antenna port; to map the plurality of reference signals to a plurality of physical antennas in accordance with a selected antenna port mapping scheme, with each reference signal corresponding to a physical antenna, and the plurality of physical antennas being aligned sequentially with equal spacing between two immediately adjacent physical antennas; to demultiplex information to be transmitted into a plurality of stream blocks; to insert a respective cyclic redundancy check to each of the stream blocks; to encode each of the stream blocks according to a corresponding coding scheme; to modulate each of the stream blocks according to a corresponding modulation scheme; to demultiplex the stream blocks to generate a plurality of sets of symbols, with each stream block being demultiplexed into a set of symbols; to map the plurality of sets of symbols into the plurality of antenna ports in accordance with a selected symbol mapping scheme; and to transmit the plurality of sets of symbols via the corresponding antenna ports, with each set of symbols being transmitted via a subset of antenna ports, with, within each subset of antenna ports, the distance between the physical antennas of the corresponding antenna ports being larger than the average distance among the plurality of physical antennas.
Abstract:
The present invention relates to a method for analyzing a decoded digital signal stream. The method comprises decoding an encoded digital signal stream to obtain a decoded digital stream and terminating (305) the decoding operation in an N dimension, wherein N is an integer greater than one. The method further comprises calculating (310) one or more syndromes in a dimension not comprising the N dimension of the decoded digital signal stream. At least one invalid syndrome is then detected (315) from the one or more calculated syndromes. In one embodiment, an error is reported (320) in the decoded digital stream based upon detecting at least one invalid syndrome.
Abstract:
L'invention concerne un système récepteur à turbo code d'un signal émis par un système émetteur, turbo codé, modulé et caractérisé en ce qu'il comporte : - un démappeur souple (1) dont la sortie est connectée à un turbo décodeur (2), et comporte également une boucle d'asservissement adaptative comportant : - un générateur de mesure (3) dont l'entrée est connectée à la sortie du turbo décodeur afin de recevoir le vecteur de fiabilité (LLRout) du résultat et apte à transformer ce vecteur en une mesure de fiabilité (M(l)), égale à la moyenne des plus petites valeurs de fiabilité des bits du mot, transmise à - un estimateur (4) de déphasage dont la sortie est connectée à - un compensateur (5) de phase positionné en amont du démappeur souple et apte à corriger le signal entrant de la valeur de phase (f).
Abstract:
A method and apparatus for decoding an encoded codeword having a plurality of bits, wherein each of the plurality of bits includes a soft value, the decoder comprising: a plurality of bit cells arranged in a first array, wherein each bit cell stores the soft value within for a corresponding bit; and a controller module coupled to the first array of bit cells, the controller module for performing a component decode on each soft value in the plurality of bit cell, wherein the controller module rotates the soft values between each of the bit cells along the first array using a connection scheme.
Abstract:
The invention concerns a module for decoding a concatenated code, corresponding at least to two elementary codes C1 and C2, using storage means (81, 83, 90, 111, 113) wherein are stored samples of data to be decoded, comprising at least two elementary decoders (821, 822, , 83m) of at least one of the elementary codes, the elementary decoders associated with one of the elementary codes simultaneously processing, in parallel separate code words contained in the storage means.
Abstract:
A method and apparatus for decoding a linear block encoded string of information bits comprising: converting the string into a plurality of codewords. Performing hard and soft decision on each codeword to generate a hard and soft decision vector. Computing the syndrome and finding the location of the two minimum values by Galois Field Arithmetic. Designating these values LOW1 and LOW2 and xoring with a Nc1, thus generating Nc2. Swapping Nc1 with Nc2 and determining the lowest soft decision value, Min1 and a next lowest value, Min2. The two bit locations creating Min1 are designated as MinA and MinB. MinA being replaced with Min2 minus the value MinA. MinB being replaced with Min2 minus the value at MinB. Generating an output codeword by subtracting Min1 from all other bit locations values and 2's complementing all soft values with 0 in their location. Creating the new soft value vector.
Abstract:
A hyper encoder module encodes a block of data having a plurality of sub-blocks. Each sub-block includes a plurality of systematic block code codewords. A parity sub-block is added to the block. The parity sub-block is a first sub-block rotated by a predetermined number of bits. Each subsequent sub-block in the n-dimensional block is rotated by an appropriate number of bits and bit-wise XORed. An encoder method and apparatus which includes the hyper encoder module receives the block of data. A row of the block is immediately output and encoded by a first module according to a first encoding scheme. A column is encoded by a second module according to a second encoding scheme. A second set of encoded data is generated, iteratively updated and output by the second module. The hyper encoder module hyper-diagonally encodes the information bits as described above and then output.
Abstract:
A method of transmitting a plurality of bits via at least two earners each having a data rate for achieving transmission despite an impaired carrier, the method includes: receiving the plurality of bits for transmission via the at least two carriers; populating the plurality of bits in a N-dimensional bit structure using an aggregation pattern; producing a coded transmit block having N dimensions, a plurality of encoded rows and a plurality of encoded bits by encoding the N-dimensional bit structure; assigning each of the plurality of encoded bits to each of the at least two carriers; and transmitting the plurality of encoded bits via the at least two carriers.
Abstract:
A parallel concatenated gallager code encoder provides at least one data bit, a first parity bit and a second parity bit, where the first parity bit is associated with a low density parity check code having a higher error correcting capability than a low density parity check code associated with the second parity bit; a modulator provides a modulated signal using a symbol constellation having at least eight symbols, each symbol associated with at least three bits, where at least one of the three bits has less reliability than the remaining bits; and a mapper maps the at least one data bit to those bit positions of a symbol having higher reliability than the at least one bit position having less reliability and maps the second parity bit to the at least one bit position having less reliability.