NESTING ATMOSPHERIC ROBOT ARMS FOR HIGH THROUGHPUT

    公开(公告)号:WO2023086848A1

    公开(公告)日:2023-05-19

    申请号:PCT/US2022/079585

    申请日:2022-11-09

    Inventor: BLANK, Richard M

    Abstract: Nesting wafer handling robot arms are provided that may be used to move semiconductor wafers between various wafer placement locations in a semiconductor processing tool. The nesting wafer handling robot arms may be configured so that each wafer handling may be able to translate along a translation system and pick and place wafers independent of what the other wafer handling may be doing. The two wafer handling robot arms may enter a nesting configuration so that each wafer handling robot may concurrently pick or place wafers from wafer placement locations where one wafer placement location is directly above the other.

    ULTRASONIC FINGERPRINT SENSOR TECHNOLOGIES AND METHODS FOR MULTI-SURFACE DISPLAYS

    公开(公告)号:WO2023009908A1

    公开(公告)日:2023-02-02

    申请号:PCT/US2022/072632

    申请日:2022-05-27

    Abstract: Apparatuses, systems, and methods are provided for ultrasonic fingerprint sensors that feature an ultrasonic transmitter and multiple subsets of ultrasonic sensor pixels, each subset of ultrasonic sensor pixels associated with a different ultrasonically sensitive display surface, at least two of which are non-coplanar with one another. In some implementations, the ultrasonically sensitive display surfaces may be provided by different portions of a flexible display that has been flexed into a configuration in which two or more portions thereof are non-coplanar. In some instances, a controller may be provided that selectively reads ultrasonic sensor signals from subset(s) of the ultrasonic sensor pixels that are associated with the ultrasonically sensitive display surfaces that a touch-sensing system indicates are experiencing touch events.

    ROTATIONAL INDEXERS WITH WAFER CENTERING CAPABILITY

    公开(公告)号:WO2022231987A1

    公开(公告)日:2022-11-03

    申请号:PCT/US2022/026049

    申请日:2022-04-22

    Abstract: Rotational indexers are provided that allow for wafer-by-wafer centering to be performed in association with each wafer pedestal-to-pedestal transfer operation within a multi-station chamber. One such rotational indexer has a rotational center axis that is movable along one or more lateral directions in order to provide wafer centering capability; sealing arrangements with lateral movement capability are provided for such implementations. Another such rotational indexer uses additional rotational capability at the wafer supports of the indexer, in combination with deliberate off-center placement of the wafers on the wafer supports of the indexer, to provide wafer centering capability.

    HIGH-CONDUCTANCE VACUUM VALVES FOR WAFER PROCESSING SYSTEMS

    公开(公告)号:WO2022020707A1

    公开(公告)日:2022-01-27

    申请号:PCT/US2021/042951

    申请日:2021-07-23

    Abstract: A semiconductor processing chamber performs various wafer processing operations that involve at least one of pumping the chamber to high vacuum states and regulating a vacuum (e.g., during introduction of process gases, as gas infiltrates the chamber, as reactions emit gases, as a wafer off-gases, etc.). A vacuum valve may be fluidically coupled between a vacuum pumping system and at least a portion of the semiconductor processing chamber. The vacuum valve may be a high-conductance multi-stage poppet valve enabling a relatively high gas flow rate and/or low pressure drop. In an open state, the multi-stage design of the poppet valve may have larger cross-sectional openings, in aggregate, than a comparable single-stage poppet valve could achieve, thereby increasing conductance.

    SEMICONDUCTOR PROCESSING CHAMBER WITH DUAL-LIFT MECHANISM FOR EDGE RING ELEVATION MANAGEMENT

    公开(公告)号:WO2021173498A1

    公开(公告)日:2021-09-02

    申请号:PCT/US2021/019099

    申请日:2021-02-22

    Abstract: Systems and techniques for providing for semiconductor processing chambers configured for use with two concentric edge rings with dual-lift mechanisms are disclosed. The dual-lift mechanisms may each have a first lifter structure and a second lifter structure which may be each at least partially independently actuatable. The first lifter structure may be used to move a lower edge ring of the edge rings between two or more vertically offset positions, and the second lifter structure may be used to raise and lower an upper edge ring of the edge rings. The dual-lift mechanism may be interfaced to the chamber housing of the semiconductor processing chamber.

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