-
公开(公告)号：WO2012096909A3
公开(公告)日：2013-01-17
申请号：PCT/US2012020704
申请日：2012-01-10
Applicant: IBM , FAROOQ MUKTA G , GRAVES-ABE TROY L , HANNON ROBERT , KINSER EMILY R , LANDERS WILLIAM F , PETRARCA KEVIN S , VOLANT RICHARD P , WINSTEL KEVIN R
Inventor： FAROOQ MUKTA G , GRAVES-ABE TROY L , HANNON ROBERT , KINSER EMILY R , LANDERS WILLIAM F , PETRARCA KEVIN S , VOLANT RICHARD P , WINSTEL KEVIN R
IPC: H01L21/027
CPC classification number: H01L21/76898 , H01L21/8221 , H01L23/544 , H01L24/83 , H01L24/92 , H01L24/94 , H01L25/0657 , H01L2223/54426 , H01L2224/29187 , H01L2224/2919 , H01L2224/32145 , H01L2224/8385 , H01L2224/83896 , H01L2224/9202 , H01L2224/94 , H01L2225/06541 , H01L2225/06593 , H01L2924/14 , H01L2924/1431 , H01L2924/1434 , H01L2924/1436 , H01L2224/83
Abstract: A method of forming alignment marks in three dimensional (3D) structures and corresponding structures are disclosed. The method includes forming apertures (126) in a first surface of a first semiconductor substrate; joining the first surface of the first semiconductor substrate to a first surface of a second semiconductor substrate; thinning the first semiconductor on a second surface of the first semiconductor substrate to provide optical contrast between the apertures and the first semiconductor substrate (116); and aligning a feature on the second surface of the first semiconductor substrate using the apertures as at least one alignment mark.
Abstract translation: 公开了一种在三维（3D）结构和对应结构中形成对准标记的方法。 该方法包括在第一半导体衬底的第一表面中形成孔（126）; 将第一半导体衬底的第一表面接合到第二半导体衬底的第一表面; 在第一半导体衬底的第二表面上减薄第一半导体以提供孔和第一半导体衬底（116）之间的光学对比度。 以及使用所述孔将所述第一半导体衬底的所述第二表面上的特征对准为至少一个对准标记。
-
公开(公告)号：WO2012151229A2
公开(公告)日：2012-11-08
申请号：PCT/US2012/036038
申请日：2012-05-02
Inventor： FAROOQ, Mukta G. , GRAVES-ABE, Troy L.
IPC: H01L21/768 , H01L21/28
CPC classification number: H01L21/76877 , H01L21/76898 , H01L23/481 , H01L2924/0002 , H01L2924/00
Abstract: A TSV can be formed having a top section via formed through the top substrate surface and a bottom section via formed through the bottom substrate surface. The top section cross section can have a minimum cross section corresponding to design rules, and the top section depth can correspond to a workable aspect ratio. The top section via can be filled or plugged so that top side processing can be continued. The bottom section via can have a larger cross section for ease of forming a conductive path therethrough. The bottom section via extends from the back side to the bottom of the top section via and is formed after the substrate has been thinned. The TSV can be completed by forming a conductive path after removing sacrificial fill materials from the joined top and bottom section vias.
Abstract translation: 可以形成TSV，其具有通过顶部衬底表面形成的顶部截面，以及通过底部衬底表面形成的底部截面。 顶部截面可以具有对应于设计规则的最小横截面，并且顶部截面深度可对应于可工作的纵横比。 顶部通孔可以被填充或插入，以便可以继续顶部处理。 底部通孔可以具有更大的横截面，以便于形成穿过其中的导电路径。 底部部分通孔从顶部部分通孔的背面延伸到底部，并且在基板变薄之后形成。 可以通过在从接合的顶部和底部部分通孔去除牺牲填充材料之后形成导电路径来完成TSV。
-
公开(公告)号：WO2012151229A3
公开(公告)日：2013-01-03
申请号：PCT/US2012036038
申请日：2012-05-02
Applicant: IBM , FAROOQ MUKTA G , GRAVES-ABE TROY L
Inventor： FAROOQ MUKTA G , GRAVES-ABE TROY L
IPC: H01L21/768 , H01L21/28
CPC classification number: H01L21/76877 , H01L21/76898 , H01L23/481 , H01L2924/0002 , H01L2924/00
Abstract: A TSV can be formed having a top section via formed through the top substrate surface and a bottom section via formed through the bottom substrate surface. The top section cross section can have a minimum cross section corresponding to design rules, and the top section depth can correspond to a workable aspect ratio. The top section via can be filled or plugged so that top side processing can be continued. The bottom section via can have a larger cross section for ease of forming a conductive path therethrough. The bottom section via extends from the back side to the bottom of the top section via and is formed after the substrate has been thinned. The TSV can be completed by forming a conductive path after removing sacrificial fill materials from the joined top and bottom section vias.
Abstract translation: 可以形成TSV，其具有通过顶部衬底表面形成的顶部截面，以及通过底部衬底表面形成的底部截面。 顶部截面可以具有对应于设计规则的最小横截面，并且顶部截面深度可对应于可工作的纵横比。 顶部通孔可以被填充或插入，以便可以继续顶部处理。 底部通孔可以具有更大的横截面，以便于形成穿过其中的导电路径。 底部部分通孔从顶部部分通孔的背面延伸到底部，并且在基板变薄之后形成。 可以通过在从接合的顶部和底部部分通孔去除牺牲填充材料之后形成导电路径来完成TSV。
-
公开(公告)号：WO2012096909A2
公开(公告)日：2012-07-19
申请号：PCT/US2012/020704
申请日：2012-01-10
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION , FAROOQ, Mukta, G , GRAVES-ABE, Troy, L. , HANNON, Robert , KINSER, Emily, R , LANDERS, William, F , PETRARCA, Kevin, S , VOLANT, Richard, P , WINSTEL, Kevin, R.
Inventor： FAROOQ, Mukta, G , GRAVES-ABE, Troy, L. , HANNON, Robert , KINSER, Emily, R , LANDERS, William, F , PETRARCA, Kevin, S , VOLANT, Richard, P , WINSTEL, Kevin, R.
IPC: H01L21/027
CPC classification number: H01L21/76898 , H01L21/8221 , H01L23/544 , H01L24/83 , H01L24/92 , H01L24/94 , H01L25/0657 , H01L2223/54426 , H01L2224/29187 , H01L2224/2919 , H01L2224/32145 , H01L2224/8385 , H01L2224/83896 , H01L2224/9202 , H01L2224/94 , H01L2225/06541 , H01L2225/06593 , H01L2924/14 , H01L2924/1431 , H01L2924/1434 , H01L2924/1436 , H01L2224/83
Abstract: A method of forming alignment marks in three dimensional (3D) structures and corresponding structures are disclosed. The method includes forming apertures (126) in a first surface of a first semiconductor substrate; joining the first surface of the first semiconductor substrate to a first surface of a second semiconductor substrate; thinning the first semiconductor on a second surface of the first semiconductor substrate to provide optical contrast between the apertures and the first semiconductor substrate (116); and aligning a feature on the second surface of the first semiconductor substrate using the apertures as at least one alignment mark.
Abstract translation: 公开了一种在三维（3D）结构和对应结构中形成对准标记的方法。 该方法包括在第一半导体衬底的第一表面中形成孔（126）; 将第一半导体衬底的第一表面接合到第二半导体衬底的第一表面; 在第一半导体衬底的第二表面上减薄第一半导体以提供孔和第一半导体衬底（116）之间的光学对比度。 以及使用所述孔将所述第一半导体衬底的所述第二表面上的特征对准为至少一个对准标记。
-
-
-
Search Results
4
records
(took 0.009 seconds)
