公开(公告)号：WO2012149569A1

公开(公告)日：2012-11-01

申请号：PCT/US2012/035882

申请日：2012-04-30

Applicant: QUALCOMM INCORPORATED ,  JUNG, Seong-Ook ,  KIM, Jisu ,  JUNG, Youngdon ,  KIM, Jung Pill ,  KANG, Seung H.

Inventor： JUNG, Seong-Ook ,  KIM, Jisu ,  JUNG, Youngdon ,  KIM, Jung Pill ,  KANG, Seung H.

IPC: G11C11/16 ,  G11C7/14 ,  G11C7/06 ,  G11C16/28 ,  G11C16/26 ,  G11C13/00

CPC classification number: G11C13/0069 ,  G11C7/06 ,  G11C7/14 ,  G11C11/16 ,  G11C13/004 ,  G11C16/26 ,  G11C16/28

Abstract: A resistance based memory sensing circuit (302) has reference current transistors (310, 312) feeding a reference node (204) and a read current transistor (308) feeding a sense node, each transistor has a substrate body at a regular substrate voltage during a stand-by mode and biased during a sensing mode at a body bias voltage lower than the regular substrate voltage. In one option the body bias voltage is determined by a reference voltage on the reference node. The substrate body at the regular substrate voltage causes the transistors to have a regular threshold voltage, and the substrate body at the body bias voltage causes the transistors to have a sense mode threshold voltage, lower than the regular threshold voltage.

Abstract translation: 基于电阻的存储器感测电路（302）具有馈送参考节点（204）的参考电流晶体管（310,312）和馈送感测节点的读取电流晶体管（308），每个晶体管具有在正常衬底电压下的衬底主体 待机模式并且在感测模式期间偏置在比正常衬底电压低的体偏置电压。 在一个选项中，体偏置电压由参考节点上的参考电压确定。 处于规则衬底电压的衬底体使晶体管具有规则的阈值电压，并且在体偏置电压下的衬底体使晶体管具有低于常规阈值电压的感测模式阈值电压。

公开(公告)号：WO2011136965A1

公开(公告)日：2011-11-03

申请号：PCT/US2011/032900

申请日：2011-04-18

Applicant: QUALCOMM INCORPORATED ,  RYU, Kyungho ,  KIM, Jisu ,  JUNG, Seong-Ook ,  KANG, Seung H.

Inventor： RYU, Kyungho ,  KIM, Jisu ,  JUNG, Seong-Ook ,  KANG, Seung H.

IPC: G11C11/16

CPC classification number: G11C11/1675 ,  G11C11/1659 ,  H01L43/12 ,  Y10T29/4902

Abstract: In a Spin Transfer Torque Magnetoresi stive Random Access Memory (STT-MRAM) a bit cell array can have a source line substantially parallel to a word line. The source line can be substantially perpendicular to bit lines. A source line control unit includes a common source line driver and a source line selector configured to select individual ones of the source lines. The source line driver and source line selector can be coupled in multiplexed relation. A bit line control unit includes a common bit line driver and a bit line selector in multiplexed relation. The bit line control unit includes a positive channel metal oxide semiconductor (PMOS) element coupled between the common source line driver and bit line select lines and bit lines. Write disturb is prevented by setting a voltage associated with unselected ones of the bit lines equal to a selected source line.

Abstract translation: 在转移转矩磁阻随机存取存储器（STT-MRAM）中，位单元阵列可以具有基本上平行于字线的源极线。 源极线可以基本上垂直于位线。 源极线控制单元包括公共源极线驱动器和被配置为选择各个源极线的源极线选择器。 源极线驱动器和源极线选择器可以以多路复用关系耦合。 位线控制单元包括公共位线驱动器和多路复用关系的位线选择器。 位线控制单元包括耦合在公共源线驱动器和位线选择线和位线之间的正沟道金属氧化物半导体（PMOS）元件。 通过设置与未选择的位线等于所选择的源极线的电压来防止写入干扰。

公开(公告)号：WO2011091217A2

公开(公告)日：2011-07-28

申请号：PCT/US2011/021988

申请日：2011-01-21

Applicant: QUALCOMM INCORPORATED ,  JUNG, Seong-Ook ,  KIM, Jisu ,  SONG, Jee-Hwan ,  KANG, Seung H.

Inventor： JUNG, Seong-Ook ,  KIM, Jisu ,  SONG, Jee-Hwan ,  KANG, Seung H.

IPC: G06F17/50 ,  G11C11/16 ,  G11C7/06

CPC classification number: G06F17/5036 ,  G06F2217/10 ,  G11C7/02 ,  G11C7/06 ,  G11C11/1673

公开(公告)号：WO2010002637A1

公开(公告)日：2010-01-07

申请号：PCT/US2009/048301

申请日：2009-06-23

Applicant: QUALCOMM INCORPORATED ,  JUNG, Seong-Ook ,  KIM, Jisu ,  SONG, Jee-Hwan ,  KANG, Seung, H. ,  YOON, Sei, Seung

Inventor： JUNG, Seong-Ook ,  KIM, Jisu ,  SONG, Jee-Hwan ,  KANG, Seung, H. ,  YOON, Sei, Seung

IPC: G11C11/16

CPC classification number: G11C7/14 ,  G11C11/1673 ,  G11C13/0002 ,  G11C13/004 ,  G11C2013/0054

Abstract: Systems and methods of controlled value reference signals of resistance based memory circuits are disclosed. In a particular embodiment, a circuit device is disclosed that includes a first input configured to receive a reference control signal. The circuit device also includes an output responsive to the first input to selectively provide a controlled value reference voltage to a sense amplifier coupled to a resistance based memory cell.

Abstract translation: 公开了基于电阻的存储器电路的受控值参考信号的系统和方法。 在特定实施例中，公开了一种电路装置，其包括被配置为接收参考控制信号的第一输入。 电路装置还包括响应于第一输入的输出，以选择性地向耦合到基于电阻的存储器单元的读出放大器提供受控值参考电压。

公开(公告)号：WO2012108651A3

公开(公告)日：2012-12-20

申请号：PCT/KR2012000858

申请日：2012-02-07

Applicant: LG ELECTRONICS INC ,  SONG KYUHO ,  KANG SUNKIL ,  KANG DAYEON ,  KIM TAEYOUNG ,  HAN SEUNGMOK ,  LIM GUEISAM ,  KIM JISU

Inventor： SONG KYUHO ,  KANG SUNKIL ,  KANG DAYEON ,  KIM TAEYOUNG ,  HAN SEUNGMOK ,  LIM GUEISAM ,  KIM JISU

IPC: G01N33/53 ,  G01N27/26 ,  G01N33/532 ,  G01N33/551

CPC classification number: G01N33/54373 ,  G01N27/3277 ,  G01N33/5438 ,  Y10T436/11

Abstract: A biochip including conductive particle and a device for detecting target antigen comprising the biochip are disclosed. According to the present invention, a target antigen can be effectively detected using a small amount of target antigen alone, whereby nonspecific detection signal can be reduced and an amplified signal can be detected.

Abstract translation: 公开了一种包括导电颗粒的生物芯片和用于检测包含生物芯片的靶抗原的装置。 根据本发明，可以使用少量的目标抗原单独有效地检测靶抗原，从而可以减少非特异性检测信号并且可以检测到放大的信号。

公开(公告)号：WO2012108669A2

公开(公告)日：2012-08-16

申请号：PCT/KR2012000889

申请日：2012-02-07

Applicant: UNIV KYUNG HEE UNIV IND COOP GROUP ,  HAH SANG SOO ,  KIM JISU

Inventor： HAH SANG SOO ,  KIM JISU

IPC: C12N15/115 ,  C12Q1/68 ,  G01N33/00

CPC classification number: C12N15/115 ,  C12N2310/16

Abstract: Provided is a uranyl ion specific DNA aptamer. Also provided is a uranyl ion specific DNA aptamer which is bound to a solid support. Also provided is a method for isolating uranyl ions from a sample by using the uranyl ion specific DNA aptamer. The DNA aptamer of the present invention binds to uranyl ions with high specificity, such that uranium can be efficiently extracted from marine and other such environments.

Abstract translation: 提供了铀酰离子特异性DNA适体。 还提供了与固体支持物结合的铀酰离子特异性DNA适体。 还提供了通过使用铀酰离子特异性DNA适体从样品中分离铀酰离子的方法。 本发明的DNA适体以高特异性与铀酰离子结合，从而可以从海洋和其他这样的环境有效地提取铀。

公开(公告)号：WO2012099364A2

公开(公告)日：2012-07-26

申请号：PCT/KR2012/000355

申请日：2012-01-16

Applicant: LG ELECTRONICS INC. ,  KIM, Taeyoung ,  KANG, Sunkil ,  KANG, Dayeon ,  HAN, Seungmok ,  SONG, Kyuho ,  LIM, Gueisam ,  KIM, Jisu

Inventor： KIM, Taeyoung ,  KANG, Sunkil ,  KANG, Dayeon ,  HAN, Seungmok ,  SONG, Kyuho ,  LIM, Gueisam ,  KIM, Jisu

IPC: G01N33/53 ,  G01N33/532 ,  G01N33/52 ,  B82Y15/00

CPC classification number: B82Y5/00 ,  B82Y15/00 ,  G01N33/54306 ,  G01N33/54346 ,  G01N33/54393

Abstract: Disclosed is a kit for amplifying detected signal in immunosensor and a method for detecting target antigen using the same according to the present invention, whereby a target antigen can be effectively detected even by a small amount of target antibody to thereby reduce nonspecific detection signal and to detect an amplified signal.

Abstract translation: 公开了一种用于扩增免疫传感器中的检测信号的试剂盒和使用该试剂盒检测靶抗原的方法，由此即使通过少量的靶抗体也可以有效地检测靶抗原 从而减少非特定检测信号并检测放大信号。

公开(公告)号：WO2011091207A1

公开(公告)日：2011-07-28

申请号：PCT/US2011/021974

申请日：2011-01-21

Applicant: QUALCOMM INCORPORATED ,  JUNG, Seong-Ook ,  KIM, Jisu ,  KANG, Seung, H.

Inventor： JUNG, Seong-Ook ,  KIM, Jisu ,  KANG, Seung, H.

IPC: G11C11/16

CPC classification number: G11C11/16 ,  G11C11/1673

Abstract: A resistance-based memory with a reduced voltage I/O device is disclosed. In a particular embodiment, a circuit includes a data path including a first resistive memory cell and a first load transistor. A reference path includes a second resistive memory cell and a second load transistor. The first load transistor and the second load transistor are input and output (I/O) transistors adapted to operate at a load supply voltage similar to a core supply voltage of a core transistor within the circuit.

Abstract translation: 公开了一种具有降压I / O装置的基于电阻的存储器。 在特定实施例中，电路包括包括第一电阻存储器单元和第一负载晶体管的数据路径。 参考路径包括第二电阻存储器单元和第二负载晶体管。 第一负载晶体管和第二负载晶体管是适于在类似于电路内的核心晶体管的核心电源电压的负载电源电压下工作的输入和输出（I / O）晶体管。

公开(公告)号：WO2013003833A1

公开(公告)日：2013-01-03

申请号：PCT/US2012/045173

申请日：2012-07-01

Applicant: QUALCOMM Incorporated ,  JUNG, Seong-Ook ,  KIM, Jisu ,  RYU, Kyungho ,  KIM, Jung Pill ,  KANG, Seung H.

Inventor： JUNG, Seong-Ook ,  KIM, Jisu ,  RYU, Kyungho ,  KIM, Jung Pill ,  KANG, Seung H.

IPC: G11C7/06 ,  G11C7/12 ,  G11C11/16 ,  G11C11/26 ,  G11C11/4091

CPC classification number: G11C7/067 ,  G11C7/12 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/4091 ,  G11C16/26

Abstract: A circuit includes a degeneration p-channel metal - oxide - semiconductor (PMOS) transistor (102), a load PMOS transistor (104), and a clamp transistor (110) configured to clamp a voltage applied to a resistance based memory element (112) during a sensing operation. A gate of the load PMOS transistor is controlled by an output of a not- AND (NAND) circuit (106).

Abstract translation: 电路包括退化的p沟道金属氧化物半导体（PMOS）晶体管（102），负载PMOS晶体管（104）和钳位晶体管（110），其被配置为钳位施加到基于电阻的存储元件（112）的电压 ）。 负载PMOS晶体管的栅极由非AND（NAND）电路（106）的输出控制。

公开(公告)号：WO2013003832A1

公开(公告)日：2013-01-03

申请号：PCT/US2012/045172

申请日：2012-07-01

Applicant: QUALCOMM Incorporated ,  JUNG, Seong-Ook ,  KIM, Jisu ,  RYU, Kyungho ,  KANG, Seung H.

Inventor： JUNG, Seong-Ook ,  KIM, Jisu ,  RYU, Kyungho ,  KANG, Seung H.

IPC: G11C7/06 ,  G11C7/12 ,  G11C11/16 ,  G11C16/26 ,  G11C11/4091

CPC classification number: G11C7/067 ,  G11C7/12 ,  G11C11/1655 ,  G11C11/1673 ,  G11C11/4091 ,  G11C13/004 ,  G11C16/26 ,  G11C2207/002

Abstract: A circuit (101) includes a degeneration p-channel metal - oxide - semiconductor (PMOS) transistor (102), a load PMOS transistor (104), and a clamp transistor (110) configured to clamp a voltage applied to a resistance based memory element (112) during a sensing operation. A gate of the load PMOS transistor (118) is controlled by an output (120) of an operational amplifier (106).

Abstract translation: 电路（101）包括退化的p沟道金属氧化物半导体（PMOS）晶体管（102），负载PMOS晶体管（104）和钳位晶体管（110），其被配置为钳位施加到基于电阻的存储器 元件（112）。 负载PMOS晶体管（118）的栅极由运算放大器（106）的输出（120）控制。