公开(公告)号：WO2013012682A2

公开(公告)日：2013-01-24

申请号：PCT/US2012/046490

申请日：2012-07-12

Applicant: SANDISK TECHNOLOGIES INC. ,  PURAYATH, Vinod R. ,  KAI, James K. ,  PACHAMUTHU, Jayavel ,  LIANG, Jarrett Jun ,  MATAMIS, George ,  HONMA, Ryoichi

Inventor： PURAYATH, Vinod R. ,  KAI, James K. ,  PACHAMUTHU, Jayavel ,  LIANG, Jarrett Jun ,  MATAMIS, George ,  HONMA, Ryoichi

IPC: H01L21/768 ,  H01L23/532

CPC classification number: H01L23/53238 ,  H01L21/7682 ,  H01L21/76834 ,  H01L21/76849 ,  H01L21/76882 ,  H01L21/76885 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device including a plurality of copper interconnects. At least a first portion of the plurality of copper interconnects has a meniscus in a top surface. The semiconductor device also includes a plurality of air gaps, wherein each air gap of the plurality of air gaps is located between an adjacent pair of at least the first portion of the plurality of bit lines.

Abstract translation: 包括多个铜互连的半导体器件。 多个铜互连的至少第一部分在顶面中具有弯月面。 所述半导体器件还包括多个气隙，其中所述多个气隙中的每个气隙位于所述多个位线的至少所述第一部分的相邻对之间。

公开(公告)号：WO2013012682A3

公开(公告)日：2013-04-04

申请号：PCT/US2012046490

申请日：2012-07-12

Applicant: SANDISK TECHNOLOGIES INC ,  PURAYATH VINOD R ,  KAI JAMES K ,  PACHAMUTHU JAYAVEL ,  LIANG JARRETT JUN ,  MATAMIS GEORGE ,  HONMA RYOICHI

Inventor： PURAYATH VINOD R ,  KAI JAMES K ,  PACHAMUTHU JAYAVEL ,  LIANG JARRETT JUN ,  MATAMIS GEORGE ,  HONMA RYOICHI

IPC: H01L21/768 ,  H01L23/532

CPC classification number: H01L23/53238 ,  H01L21/7682 ,  H01L21/76834 ,  H01L21/76849 ,  H01L21/76882 ,  H01L21/76885 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device including a plurality of copper interconnects. At least a first portion of the plurality of copper interconnects has a meniscus in a top surface. The semiconductor device also includes a plurality of air gaps, wherein each air gap of the plurality of air gaps is located between an adjacent pair of at least the first portion of the plurality of bit lines.

Abstract translation: 包括多个铜互连的半导体器件。 多个铜互连的至少第一部分在顶面具有弯液面。 半导体器件还包括多个气隙，其中多个气隙中的每个气隙位于多个位线的至少第一部分的相邻对之间。