TRI-GATE FIELD-EFFECT TRANSISTORS FORMED BY ASPECT RATIO TRAPPING
    7.
    发明申请
    TRI-GATE FIELD-EFFECT TRANSISTORS FORMED BY ASPECT RATIO TRAPPING 审中-公开
    通过纵向比例捕获形成的三栅场效应晶体管

    公开(公告)号:WO2008039495A1

    公开(公告)日:2008-04-03

    申请号:PCT/US2007/020777

    申请日:2007-09-26

    Abstract: Semiconductor structures include a trench formed proximate a substrate including a first semiconductor material. A crystalline material including a second semiconductor material lattice mismatched to the first semiconductor material is formed in the trench. Process embodiments include removing a portion of the dielectric layer to expose a side portion of the crystalline material and defining a gate thereover. Defects are reduced by using an aspect ratio trapping approach.

    Abstract translation: 半导体结构包括在包括第一半导体材料的衬底附近形成的沟槽。 在沟槽中形成包括与第一半导体材料错配的第二半导体材料晶格的结晶材料。 工艺实施例包括去除电介质层的一部分以暴露晶体材料的侧部并在其上限定栅极。 通过使用宽高比捕获方法来减少缺陷。

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