公开(公告)号：WO2009070336A1

公开(公告)日：2009-06-04

申请号：PCT/US2008/013227

申请日：2008-11-26

Applicant: SPANSION LLC ,  INOUE, Fumihiko ,  MARUYAMA, Takayuki ,  SATO, Masayuki

Inventor： INOUE, Fumihiko ,  MARUYAMA, Takayuki ,  SATO, Masayuki

IPC: H01L21/28 ,  H01L21/8246 ,  H01L27/115 ,  H01L29/792 ,  H01L29/423 ,  H01L21/768 ,  H01L21/8247 ,  H01L29/788 ,  H01L21/74

CPC classification number: H01L27/115 ,  H01L21/28273 ,  H01L21/28282 ,  H01L21/743 ,  H01L27/11521 ,  H01L27/11568 ,  H01L29/42332 ,  H01L29/42348 ,  H01L29/7887 ,  H01L29/7923

Abstract: The method for manufacturing the semiconductor device, which includes the steps of forming a charge storage layer (22) on a semiconductor substrate (10), forming an extending first groove (12) in the charge storage layer and the semiconductor substrate using a mask layer (30) formed on the charge storage layer as a mask, forming an insulating film (14) in the first groove, forming a second groove (32) extending across the first groove in the mask layer and the insulating film, forming a gate insulating film (18) formed below the second groove, forming a first conductive layer (34) in the second groove, eliminating the mask layer, forming a second conductive layer (36) on both side surfaces of the first conductive layer to form a word line (16) which includes the first and the second conductive layers, and eliminating the charge storage layer using the word line as a mask.

Abstract translation: 一种半导体器件的制造方法，包括以下步骤：在半导体衬底（10）上形成电荷存储层（22），在电荷存储层中形成延伸的第一沟槽（12），并使用掩模层 （30）形成在所述电荷存储层上作为掩模，在所述第一沟槽中形成绝缘膜（14），形成在所述掩模层中的所述第一沟槽和所述绝缘膜上延伸的第二沟槽（32） 在第二凹槽下形成的薄膜（18），在第二凹槽中形成第一导电层（34），消除掩模层，在第一导电层的两个侧表面上形成第二导电层（36）以形成字线 （16），其包括第一和第二导电层，并且使用字线作为掩模去除电荷存储层。

公开(公告)号：WO2009048601A1

公开(公告)日：2009-04-16

申请号：PCT/US2008/011628

申请日：2008-10-08

Applicant: SPANSION LLC ,  INOUE, Fumihiko ,  MARUYAMA, Takayuki

Inventor： INOUE, Fumihiko ,  MARUYAMA, Takayuki

IPC: H01L21/28 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/51 ,  H01L29/423 ,  H01L29/788 ,  H01L29/792

CPC classification number: H01L27/11521 ,  H01L21/28273 ,  H01L21/28282 ,  H01L27/115 ,  H01L27/11568 ,  H01L29/42332 ,  H01L29/42348 ,  H01L29/7887 ,  H01L29/7923

Abstract: There is provided a method for manufacturing a flash memory device comprising forming a first insulating film and a conductive layer on a semiconductor substrate; forming a first mask layer on the conductive layer; forming a second mask layer in isolation regions isolated between the first mask layer,- forming first openings by removing the conductive layer and the first insulating film by using the first and second mask layer as a mask; forming a second insulating film in the first openings and the isolation regions; removing the first mask layer, the conductive layer and the first insulating film by using the second insulating film as a mask, forming gate electrodes between the second openings; removing, through the second openings, the first insulating film, forming a gate insulating film at center portions below the gate electrodes; and forming a charge storage layer in an area where the first insulating film is removed. The finished device' has bit lines (18), gate insulating film (22), tunnel insulating film (12), separated charge storage layer (14), top insulating film (12), and gate electrode (24).

Abstract translation: 提供了一种用于制造闪速存储器件的方法，包括在半导体衬底上形成第一绝缘膜和导电层; 在导电层上形成第一掩模层; 在分离在第一掩模层之间的隔离区域中形成第二掩模层， - 通过使用第一和第二掩模层作为掩模去除导电层和第一绝缘膜来形成第一开口; 在所述第一开口和所述隔离区域中形成第二绝缘膜; 通过使用第二绝缘膜作为掩模去除第一掩模层，导电层和第一绝缘膜，在第二开口之间形成栅电极; 通过第二开口去除第一绝缘膜，在栅电极下方的中心部分形成栅极绝缘膜; 以及在去除所述第一绝缘膜的区域中形成电荷存储层。 成品装置具有位线（18），栅极绝缘膜（22），隧道绝缘膜（12），分离电荷存储层（14），顶部绝缘膜（12）和栅电极（24）。

公开(公告)号：WO2009045863A1

公开(公告)日：2009-04-09

申请号：PCT/US2008/077762

申请日：2008-09-25

Applicant: SPANSION LLC ,  MARUYAMA, Takayuki ,  INOUE, Fumihiko

Inventor： MARUYAMA, Takayuki ,  INOUE, Fumihiko

IPC: H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  H01L21/28 ,  H01L21/8246 ,  H01L21/8247

CPC classification number: H01L27/115 ,  H01L21/28273 ,  H01L21/28282 ,  H01L27/11521 ,  H01L27/11568 ,  H01L29/42332 ,  H01L29/42348 ,  H01L29/7887 ,  H01L29/7923

Abstract: A semiconductor device includes a bit line 18 formed to extend inside a semiconductor substrate 10, a gate electrode 24 formed above the semiconductor substrate 10 between the bit lines 18, a gate insulating film 22 formed on the semiconductor substrate 10 below a center of the gate electrode 24, charge storage layers 14 formed on the semiconductor substrate 10 below the gate electrode 24 to interpose the gate insulating film 22 in a width direction of the bit line 18, and a first insulating film formed on the semiconductor substrate 10 between the gate electrodes 24 in an extending direction of the bit line 18. A width of a first insulating film 30 in the width direction of the bit line 18 is larger than that of the gate insulating film 22.

Abstract translation: 半导体器件包括形成为在半导体衬底10内部延伸的位线18，在位线18之间形成在半导体衬底10上方的栅电极24，形成在半导体衬底10下方的栅极绝缘膜22 电极24，形成在栅电极24下方的半导体衬底10上的电荷存储层14，以将栅极绝缘膜22插入位线18的宽度方向;以及第一绝缘膜，形成在半导体衬底10之间的栅电极 24位于位线18的延伸方向上。位线18的宽度方向上的第一绝缘膜30的宽度大于栅极绝缘膜22的宽度。