公开(公告)号：WO2010110609A3

公开(公告)日：2010-12-09

申请号：PCT/KR2010001837

申请日：2010-03-25

Applicant: WOOREE LST CO LTD ,  KIM KEUK ,  CHOI YU HANG ,  CHO SOO YEON ,  JUNG CHUL HO ,  HEO DONG WON

Inventor： KIM KEUK ,  CHOI YU HANG ,  CHO SOO YEON ,  JUNG CHUL HO ,  HEO DONG WON

IPC: H01L33/12 ,  H01L33/20

CPC classification number: H01L27/156

Abstract: The present invention relates to a method for fabricating a nitride-based semiconductor light-emitting device, comprising the steps of: forming an element unit separation pattern for defining a plurality of light-emitting element unit regions on a substrate; providing a nitride-based semiconductor layer to the plurality of light-emitting element unit regions; and forming independent light-emitting element units.

Abstract translation: 本发明涉及一种制造氮化物基半导体发光器件的方法，该方法包括以下步骤：在衬底上形成用于限定多个发光元件单元区的元件单元分隔图案; 向所述多个发光元件单位区域提供氮化物基半导体层; 并形成独立的发光元件单元。

公开(公告)号：WO2010058991A2

公开(公告)日：2010-05-27

申请号：PCT/KR2009006847

申请日：2009-11-20

Applicant: WOOREE LST CO LTD ,  KIM KEUK ,  CHOI YU HANG ,  CHO SOO YEON ,  PARK CHI KWON

Inventor： KIM KEUK ,  CHOI YU HANG ,  CHO SOO YEON ,  PARK CHI KWON

IPC: H01L33/08

CPC classification number: H01L33/0079 ,  H01L33/0095 ,  H01L33/20

Abstract: The present disclosure relates to a method for fabricating a vertically structured, nitride-based light emitting device comprising the following steps: preparation of a substrate; formation of a trench on the substrate by either a laser- or a diamond-cutting process; cultivation of a nitride-based semiconductor layer on the substrate; and separation of said nitride-based semiconductor layer from the substrate.

Abstract translation: 本发明涉及一种用于制造垂直构造的氮化物基发光器件的方法，该方法包括以下步骤：制备衬底; 通过激光切割或金刚石切割工艺在衬底上形成沟槽; 在衬底上栽培氮化物基半导体层; 以及从衬底分离所述氮化物基半导体层。

公开(公告)号：WO2011137059A3

公开(公告)日：2012-02-16

申请号：PCT/US2011033750

申请日：2011-04-25

Applicant: APPLIED MATERIALS INC ,  YU HANG ,  PADHI DEENESH ,  CAI MAN-PING ,  YOSHIDA NAOMI ,  MIAO LI YAN ,  CHENG SIU F ,  SHAIKH SHAHID ,  PARK SOHYUN ,  PARK HEUNG LAK ,  KIM BOK HOEN

Inventor： YU HANG ,  PADHI DEENESH ,  CAI MAN-PING ,  YOSHIDA NAOMI ,  MIAO LI YAN ,  CHENG SIU F ,  SHAIKH SHAHID ,  PARK SOHYUN ,  PARK HEUNG LAK ,  KIM BOK HOEN

IPC: H01L21/205 ,  H01L21/027

CPC classification number: H01L21/02115 ,  C23C16/26 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/0332 ,  H01L21/0337 ,  H01L21/0338

Abstract: Embodiments described herein relate to materials and processes for patterning and etching features in a semiconductor substrate. In one embodiment, a method of forming a composite amorphous carbon layer for improved stack defectivity on a substrate is provided. The method comprises positioning a substrate in a process chamber, introducing a hydrocarbon source gas into the process chamber, introducing a diluent source gas into the process chamber, introducing a plasma-initiating gas into the process chamber, generating a plasma in the process chamber, forming an amorphous carbon initiation layer on the substrate, wherein the hydrocarbon source gas has a volumetric flow rate to diluent source gas flow rate ratio of 1:12 or less; and forming a bulk amorphous carbon layer on the amorphous carbon initiation layer, wherein a hydrocarbon source gas used to form the bulk amorphous carbon layer has a volumetric flow rate to a diluent source gas flow rate of 1:6 or greater to form the composite amorphous carbon layer.

Abstract translation: 本文描述的实施例涉及用于图案化和蚀刻半导体衬底中的特征的材料和工艺。 在一个实施例中，提供了形成用于提高衬底缺陷率的复合非晶碳层的方法。 该方法包括将基板定位在处理室中，将烃源气体引入处理室中，将稀释源气体引入处理室，将等离子体起始气体引入处理室，在处理室中产生等离子体， 在所述基板上形成无定形碳起始层，其中所述烃源气体的体积流量与稀释剂源气体流量比为1:12以下; 以及在所述无定形碳起始层上形成块状无定形碳层，其中用于形成所述块状无定形碳层的烃源气体具有以1:6或更大的稀释剂源气体流量的体积流量，以形成所述复合非晶体 碳层。

公开(公告)号：WO2011137059A2

公开(公告)日：2011-11-03

申请号：PCT/US2011/033750

申请日：2011-04-25

Applicant: APPLIED MATERIALS, INC. ,  YU, Hang ,  PADHI, Deenesh ,  CAI, Man-Ping ,  YOSHIDA, Naomi ,  MIAO, Li Yan ,  CHENG, Siu F. ,  SHAIKH, Shahid ,  PARK, Sohyun ,  PARK, Heung Lak ,  KIM, Bok Hoen

Inventor： YU, Hang ,  PADHI, Deenesh ,  CAI, Man-Ping ,  YOSHIDA, Naomi ,  MIAO, Li Yan ,  CHENG, Siu F. ,  SHAIKH, Shahid ,  PARK, Sohyun ,  PARK, Heung Lak ,  KIM, Bok Hoen

IPC: H01L21/205 ,  H01L21/027

CPC classification number: H01L21/02115 ,  C23C16/26 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/0332 ,  H01L21/0337 ,  H01L21/0338

Abstract: Embodiments described herein relate to materials and processes for patterning and etching features in a semiconductor substrate. In one embodiment, a method of forming a composite amorphous carbon layer for improved stack defectivity on a substrate is provided. The method comprises positioning a substrate in a process chamber, introducing a hydrocarbon source gas into the process chamber, introducing a diluent source gas into the process chamber, introducing a plasma-initiating gas into the process chamber, generating a plasma in the process chamber, forming an amorphous carbon initiation layer on the substrate, wherein the hydrocarbon source gas has a volumetric flow rate to diluent source gas flow rate ratio of 1:12 or less; and forming a bulk amorphous carbon layer on the amorphous carbon initiation layer, wherein a hydrocarbon source gas used to form the bulk amorphous carbon layer has a volumetric flow rate to a diluent source gas flow rate of 1:6 or greater to form the composite amorphous carbon layer.

Abstract translation: 本文描述的实施例涉及用于图案化和蚀刻半导体衬底中的特征的材料和工艺。 在一个实施例中，提供了形成用于提高衬底缺陷率的复合非晶碳层的方法。 该方法包括将基板定位在处理室中，将烃源气体引入处理室中，将稀释源气体引入处理室，将等离子体起始气体引入处理室，在处理室中产生等离子体， 在所述基板上形成无定形碳起始层，其中所述烃源气体的体积流量与稀释剂源气体流量比为1:12以下; 以及在所述无定形碳起始层上形成块状无定形碳层，其中用于形成所述块状无定形碳层的烃源气体具有以1:6或更大的稀释剂源气体流量的体积流量，以形成所述复合非晶体 碳层。

公开(公告)号：WO2009134588A3

公开(公告)日：2010-03-18

申请号：PCT/US2009039674

申请日：2009-04-06

Applicant: APPLIED MATERIALS INC ,  ZHOU JIANHUA ,  PADHI DEENESH ,  JANAKIRAMAN KARTHIK ,  CHENG SIU F ,  YU HANG ,  SARIPALLI YOGANAND N ,  SUMMAN TERSEM

Inventor： ZHOU JIANHUA ,  PADHI DEENESH ,  JANAKIRAMAN KARTHIK ,  CHENG SIU F ,  YU HANG ,  SARIPALLI YOGANAND N ,  SUMMAN TERSEM

IPC: H05H1/34 ,  H01L21/205 ,  H01L21/3065

CPC classification number: C23C16/5096 ,  H01J37/32541 ,  Y10T117/10

Abstract: A method and apparatus for adjust local plasma density during a plasma process. One embodiment provides an electrode assembly comprising a conductive faceplate having a nonplanar surface. The nonplanar surface is configured to face a substrate during processing and the conductive faceplate is disposed so that the nonplanar surface is opposing a substrate support having an electrode. The conductive faceplate and the substrate support form a plasma volume. The nonplanar surface is configured to adjust electric field between the conductive faceplate and the electrode by varying a distance between the conductive faceplate and the electrode.

Abstract translation: 一种用于在等离子体工艺期间调节局部等离子体密度的方法和装置。 一个实施例提供一种电极组件，其包括具有非平面表面的导电面板。 非平面表面被配置为在处理期间面向衬底，并且设置导电面板使得非平面表面与具有电极的衬底支撑件相对。 导电面板和基板支撑件形成等离子体体积。 非平面被配置为通过改变导电面板和电极之间的距离来调节导电面板和电极之间的电场。

公开(公告)号：WO2009134588A2

公开(公告)日：2009-11-05

申请号：PCT/US2009/039674

申请日：2009-04-06

Applicant: APPLIED MATERIALS, INC. ,  ZHOU, Jianhua ,  PADHI, Deenesh ,  JANAKIRAMAN, Karthik ,  CHENG, Siu, F. ,  YU, Hang ,  SARIPALLI, Yoganand, N. ,  SUMMAN, Tersem

Inventor： ZHOU, Jianhua ,  PADHI, Deenesh ,  JANAKIRAMAN, Karthik ,  CHENG, Siu, F. ,  YU, Hang ,  SARIPALLI, Yoganand, N. ,  SUMMAN, Tersem

IPC: H05H1/34 ,  H01L21/205 ,  H01L21/3065

CPC classification number: C23C16/5096 ,  H01J37/32541 ,  Y10T117/10

Abstract: A method and apparatus for adjust local plasma density during a plasma process. One embodiment provides an electrode assembly comprising a conductive faceplate having a nonplanar surface. The nonplanar surface is configured to face a substrate during processing and the conductive faceplate is disposed so that the nonplanar surface is opposing a substrate support having an electrode. The conductive faceplate and the substrate support form a plasma volume. The nonplanar surface is configured to adjust electric field between the conductive faceplate and the electrode by varying a distance between the conductive faceplate and the electrode.

Abstract translation: 一种用于在等离子体工艺期间调节局部等离子体密度的方法和装置。 一个实施例提供一种电极组件，其包括具有非平面表面的导电面板。 非平面表面被配置为在处理期间面向衬底，并且设置导电面板使得非平面表面与具有电极的衬底支撑件相对。 导电面板和基板支撑件形成等离子体体积。 非平面被配置为通过改变导电面板和电极之间的距离来调节导电面板和电极之间的电场。

公开(公告)号：WO2022192656A1

公开(公告)日：2022-09-15

申请号：PCT/US2022/019924

申请日：2022-03-11

Applicant: THE TRUSTEES OF COLUMBIA UNIVERSITY IN THE CITY OF NEW YORK ,  HILLMAN, Elizabeth M.C. ,  YAN, Richard Wenwei ,  LIANG, Wenxuan ,  YU, Hang

Inventor： HILLMAN, Elizabeth M.C. ,  YAN, Richard Wenwei ,  LIANG, Wenxuan ,  YU, Hang

IPC: G02B3/12 ,  B29D11/00 ,  G02B1/06 ,  G02B7/02

Abstract: A spacer for an immersion objective lens can be fabricated by pressing a set of sidewalls onto a mirror to form a liquid-tight cavity, filling the liquid-tight cavity with a first quantity of a UV-curable polymer, and curing the first quantity of the UV-curable polymer into a first solid mass that will be adhered to the mirror. The upper surface of the first solid mass is then positioned near the objective lens, with a second quantity of a UV curable polymer occupying the space between the first solid mass and the objective lens. Next, the position of the first solid mass is adjusted until it reaches a final position with respect to the objective lens. This adjustment may be assisted by checking the collimation of light reflected back through the mirror. The second quantity of the UV curable polymer is then cured.

公开(公告)号：WO2011082020A3

公开(公告)日：2011-07-07

申请号：PCT/US2010/061470

申请日：2010-12-21

Applicant: APPLIED MATERIALS, INC. ,  DU BOIS, Dale ,  AYOUB, Mohamad ,  KIM, Robert ,  BANSAL, Amit ,  FODOR, Mark ,  NGUYEN, Binh ,  CHENG, Siu F. ,  YU, Hang ,  CHAN, Chiu ,  BALASUBRAMANI, Ganesh ,  PADHI, Deenesh ,  ROCHA, Juancarlos

Inventor： DU BOIS, Dale ,  AYOUB, Mohamad ,  KIM, Robert ,  BANSAL, Amit ,  FODOR, Mark ,  NGUYEN, Binh ,  CHENG, Siu F. ,  YU, Hang ,  CHAN, Chiu ,  BALASUBRAMANI, Ganesh ,  PADHI, Deenesh ,  ROCHA, Juancarlos

IPC: H01L21/205

Abstract: Embodiments of the invention contemplate a shadow ring that provides increased or decreased and more uniform deposition on the edge of a wafer. By removing material from the top and/or bottom surfaces of the shadow ring, increased edge deposition and bevel coverage can be realized. In one embodiment, the material on the bottom surface is reduced by providing a recessed slot on the bottom surface. By increasing the amount of material of the shadow ring, the edge deposition and bevel coverage is reduced. Another approach to adjusting the deposition at the edge of the wafer includes increasing or decreasing the inner diameter of the shadow ring. The material forming the shadow ring may also be varied to change the amount of deposition at the edge of the wafer.

公开(公告)号：WO2011082020A2

公开(公告)日：2011-07-07

申请号：PCT/US2010061470

申请日：2010-12-21

Applicant: APPLIED MATERIALS INC ,  DU BOIS DALE ,  AYOUB MOHAMAD ,  KIM ROBERT ,  BANSAL AMIT ,  FODOR MARK ,  NGUYEN BINH ,  CHENG SIU F ,  YU HANG ,  CHAN CHIU ,  BALASUBRAMANI GANESH ,  PADHI DEENESH ,  ROCHA JUANCARLOS

Inventor： DU BOIS DALE ,  AYOUB MOHAMAD ,  KIM ROBERT ,  BANSAL AMIT ,  FODOR MARK ,  NGUYEN BINH ,  CHENG SIU F ,  YU HANG ,  CHAN CHIU ,  BALASUBRAMANI GANESH ,  PADHI DEENESH ,  ROCHA JUANCARLOS

IPC: H01L21/205

CPC classification number: C23C16/04 ,  C23C16/4401 ,  C23C16/45589 ,  C23C16/4585

Abstract: Embodiments of the invention contemplate a shadow ring that provides increased or decreased and more uniform deposition on the edge of a wafer. By removing material from the top and/or bottom surfaces of the shadow ring, increased edge deposition and bevel coverage can be realized. In one embodiment, the material on the bottom surface is reduced by providing a recessed slot on the bottom surface. By increasing the amount of material of the shadow ring, the edge deposition and bevel coverage is reduced. Another approach to adjusting the deposition at the edge of the wafer includes increasing or decreasing the inner diameter of the shadow ring. The material forming the shadow ring may also be varied to change the amount of deposition at the edge of the wafer.

Abstract translation: 本发明的实施例设想了一种在晶片的边缘上提供增加或减少且更均匀的沉积的遮蔽环。 通过从阴影环的顶部和/或底部表面去除材料，可以实现增加的边缘沉积和斜面覆盖。 在一个实施例中，底表面上的材料通过在底表面上设置凹槽而减小。 通过增加遮蔽环的材料的量，边缘沉积和斜面覆盖被减小。 调节晶片边缘的沉积的另一种方法包括增加或减小遮蔽环的内径。 形成阴影环的材料也可以改变以改变晶片边缘处的沉积量。

公开(公告)号：WO2010110608A3

公开(公告)日：2010-12-09

申请号：PCT/KR2010001836

申请日：2010-03-25

Applicant: WOOREE LST CO LTD ,  KIM KEUK ,  CHOI YU HANG ,  KIM BEOM JIN

Inventor： KIM KEUK ,  CHOI YU HANG ,  KIM BEOM JIN

IPC: H01L33/20

CPC classification number: H01L33/007 ,  H01L21/0254 ,  H01L21/02639 ,  H01L33/20

Abstract: The present invention relates to a nitride-based semiconductor light-emitting device, comprising: a substrate; a void inducing groove formed at the substrate; a void inducing pattern embossed on the substrate to form the void inducing groove; a nitride-based semiconductor layer formed on the void inducing pattern; and a three-dimensional void defined by the void inducing groove and the nitride-based semiconductor layer.

Abstract translation: 氮化物基半导体发光器件技术领域本发明涉及一种氮化物基半导体发光器件，包括：衬底; 在衬底上形成的空洞诱导槽; 在衬底上压印出空洞诱导图案以形成空隙诱导槽; 形成在空洞诱导图案上的氮化物基半导体层; 以及由空隙诱导槽和氮化物基半导体层限定的三维空隙。