公开(公告)号：WO2018144452A1

公开(公告)日：2018-08-09

申请号：PCT/US2018/015945

申请日：2018-01-30

Applicant: APPLIED MATERIALS, INC.

Inventor： PARK, Beom Soo ,  LEE, Dongsuh ,  YANG, Hsiao-Lin ,  CHANG, Fu-Ting ,  AN, Hsiang ,  SU, Tsung-Yao

IPC: C23C16/458 ,  C23C16/505

CPC classification number: H01L21/205 ,  C23C8/36 ,  C23C16/4405 ,  C23C16/455 ,  C23C16/4586 ,  C23C16/505 ,  C23C16/517 ,  H01L21/02131 ,  H01L21/02274 ,  H01L21/68742 ,  H01L21/68757

Abstract: A method and apparatus for equalized plasma coupling is provided herein. Discontinuity marks, also known as golf tee mura, are eliminated or minimized by biasing or grounding lift pins disposed in openings towards the center of a substrate support. To prevent shorting between a biased or grounded lift pin and the substrate support, lift pins are electrically isolated from the substrate support. The electrical isolation of the lift pin includes coating the lift pins with an electrically insulating material or lining a respective substrate support opening with an electrically insulating material.

公开(公告)号：WO2018089534A1

公开(公告)日：2018-05-17

申请号：PCT/US2017/060692

申请日：2017-11-08

Applicant: LAM RESEARCH CORPORATION

Inventor： BALDASSERONI, Chloe ,  SWAMINATHAN, Shankar

IPC: H01L21/027 ,  H01L21/3065 ,  H01L21/67 ,  H01L21/768

CPC classification number: H01L21/02164 ,  C23C16/402 ,  C23C16/45542 ,  C23C16/56 ,  H01L21/02211 ,  H01L21/02219 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02348 ,  H01L21/0332 ,  H01L21/0337 ,  H01L21/31144

Abstract: Methods and apparatuses for forming high modulus silicon oxide spacers using atomic layer deposition are provided. Methods involve depositing at high temperature, using high plasma energy, and post-treating deposited silicon oxide using ultraviolet radiation. Such silicon oxide spacers are suitable for use as masks in multiple patterning applications to prevent pitch walking.

Abstract translation: 提供了使用原子层沉积形成高模量氧化硅隔离物的方法和装置。 方法涉及使用高等离子体能量在高温下沉积，并使用紫外线辐射对沉积的氧化硅进行后处理。 这种氧化硅隔离物适合在多种图案化应用中用作掩模，以防止俯仰行走。

公开(公告)号：WO2018075225A1

公开(公告)日：2018-04-26

申请号：PCT/US2017/054485

申请日：2017-09-29

Applicant: LAM RESEARCH CORPORATION

Inventor： LEE, William T. ,  VAN SCHRAVENDIJK, Bart J. ,  SMITH, David Charles ,  DANEK, Michael ,  VAN CLEEMPUT, Patrick A. ,  CHANDRASEKHARAN, Ramesh

IPC: H01L21/02 ,  H01L21/67

CPC classification number: H01L21/28202 ,  G02F1/133502 ,  H01J37/3244 ,  H01J37/32788 ,  H01L21/02164 ,  H01L21/02175 ,  H01L21/022 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/28211 ,  H01L29/513

Abstract: Efficient integrated sequential deposition of alternating layers of dielectric and conductor, for example oxide/metal or metal nitride, e.g., SiO 2 /TiN, in a single tool, and even in a single process chamber enhances throughput without compromising quality when directly depositing a OMOM stack with many layers. Conductor and dielectric film deposition of a stack of at least 20 conductor/dielectric film pairs in the same processing tool or chamber, without breaking vacuum between the film depositions, such that there is no substantial cross-contamination between the conductor and dielectric film depositions, can be achieved.

Abstract translation: 在单个工具中有效集成顺序沉积电介质和导体（例如氧化物/金属或金属氮化物，例如SiO 2 / TiN）的交替层，并且甚至 在单个处理室中直接沉积具有多层的OMOM堆栈时增强了吞吐量，而不会影响质量。 在同一处理工具或腔室中导体和电介质膜沉积至少20个导体/电介质膜对的堆叠，而不破坏膜沉积之间的真空，使得在导体和电介质膜沉积之间不存在实质的交叉污染， 可以实现。

公开(公告)号：WO2017155808A1

公开(公告)日：2017-09-14

申请号：PCT/US2017/020634

申请日：2017-03-03

Applicant: SUNEDISON SEMICONDUCTOR LIMITED

Inventor： KWESKIN, Sasha Joseph

IPC: H01L21/762 ,  H01L21/02

CPC classification number: H01L21/76254 ,  H01L21/0214 ,  H01L21/02274 ,  H01L21/0262 ,  H01L27/1203

Abstract: A method is provided for preparing a semiconductor-on-insulator structure comprising a silicon nitride layer deposited by plasma deposition.

Abstract translation: 提供了一种用于制备包括通过等离子体沉积沉积的氮化硅层的绝缘体上半导体结构的方法。

公开(公告)号：WO2017141140A1

公开(公告)日：2017-08-24

申请号：PCT/IB2017/050692

申请日：2017-02-09

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： JINTYOU, Masami ,  KOEZUKA, Junichi ,  HAMOCHI, Takashi ,  HOSAKA, Yasuharu

IPC: H01L21/336 ,  G02F1/1368 ,  G09F9/00 ,  G09F9/30 ,  H01L29/786 ,  H01L51/50 ,  H05B33/14

CPC classification number: H01L21/385 ,  H01L21/0214 ,  H01L21/02274 ,  H01L21/02326 ,  H01L21/44 ,  H01L21/443 ,  H01L21/4757 ,  H01L29/045 ,  H01L29/4908 ,  H01L29/518 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/7869

Abstract: The field-effect mobility and reliability of a transistor including an oxide semiconductor film are improved. Provided is a semiconductor device including an oxide semiconductor film. The semiconductor device includes a first insulating film, an oxide semiconductor film over the first insulating film, a second insulating film and a third insulating film over the oxide semiconductor film, and a gate electrode over the second insulating film. The second insulating film comprises a silicon oxynitride film. When excess oxygen is added to the second insulating film by oxygen plasma treatment, oxygen can be efficiently supplied to the oxide semiconductor film.

Abstract translation: 包括氧化物半导体膜的晶体管的场效应迁移率和可靠性得到改善。 提供了一种包括氧化物半导体膜的半导体器件。 半导体器件包括第一绝缘膜，在第一绝缘膜上的氧化物半导体膜，在氧化物半导体膜上的第二绝缘膜和第三绝缘膜以及在第二绝缘膜上的栅电极。 第二绝缘膜包括氧氮化硅膜。 当通过氧等离子体处理向第二绝缘膜添加过量氧时，可以将氧有效地提供给氧化物半导体膜。

公开(公告)号：WO2017100053A1

公开(公告)日：2017-06-15

申请号：PCT/US2016/064169

申请日：2016-11-30

Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.

Inventor： CHEN, Tsung-Liang ,  HAUTALA, John ,  LIANG, Shurong

IPC: H01L21/768 ,  H01L21/265 ,  H01L21/02

CPC classification number: H01L21/02274 ,  C23C16/045 ,  C23C16/402 ,  C23C16/513 ,  H01L21/02164 ,  H01L21/02211 ,  H01L21/31116 ,  H01L21/76224 ,  H01L21/76831

Abstract: A method may include generating a plasma in a plasma chamber and directing the ions comprising at least one of a condensing species and inert gas species from the plasma to a cavity within a substrate at a non-zero angle of incidence with respect to a perpendicular to a plane of the substrate. The method may further include; depositing a fill material within the cavity using the condensing species, the depositing taking place concurrently with the directing the ions, wherein the fill material accumulates on a lower surface of the cavity at a first rate, and wherein the fill material accumulates on an upper portion of a sidewall of the cavity at a second rate less than the first rate.

Abstract translation: 一种方法可以包括在等离子体室中产生等离子体并且将包括来自等离子体的冷凝物质和惰性气体物质中的至少一种的离子引导至衬底内的空腔以非零角度 相对于垂直于衬底平面的入射角。 该方法可以进一步包括： 使用冷凝物质在腔内沉积填充材料，沉积与引导离子同时进行，其中填充材料以第一速率积聚在腔的下表面上，并且其中填充材料积聚在腔的上部 以小于所述第一速率的第二速率传播所述空腔的侧壁。

公开(公告)号：WO2016205196A2

公开(公告)日：2016-12-22

申请号：PCT/US2016/037370

申请日：2016-06-14

Applicant: AIR PRODUCTS AND CHEMICALS, INC.

Inventor： LEI, Xinjian ,  LI, Jianheng ,  LEHMANN, John, Francis ,  COOPER, Alan, Charles

IPC: C23C16/455 ,  C23C14/10 ,  C23C14/06 ,  C23C16/24 ,  C23C16/34 ,  C23C16/40 ,  C23C16/36 ,  C07F7/02

CPC classification number: C23C16/45553 ,  C07F7/02 ,  C23C16/24 ,  C23C16/345 ,  C23C16/36 ,  C23C16/402 ,  C23C16/45536 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/32055

Abstract: Halidosilane compounds, processes for synthesizing halidosilane compounds, compositions comprising halidosilane precursors, and processes for depositing silicon- containing films (e.g., silicon, amorphous silicon, silicon oxide, silicon nitride, silicon carbide, silicon oxynitride, silicon carbonitride, doped silicon films, and metal-doped silicon nitride films) using halidosilane precursors. Examples of halidosilane precursor compounds described herein, include, but are not limited to, monochlorodisilane (MCDS), monobromodisilane (MBDS), monoiododisilane (MIDS), monochlorotrisilane (MCTS), and monobromotrisilane (MBTS), monoiodotrisilane (MITS). Also described herein are methods for depositing silicon containing films such as, without limitation, silicon, amorphous silicon, silicon oxide, silicon nitride, silicon carbide, silicon oxynitride, silicon carbonitride, doped silicon films, and metal-doped silicon nitride films, at one or more deposition temperatures of about 500°C or less.

Abstract translation: 卤化硅烷化合物，合成卤代硅烷化合物的方法，包含卤代硅烷前体的组合物和沉积含硅膜（例如硅，非晶硅，氧化硅，氮化硅，碳化硅，氮氧化硅，碳氮化硅，掺杂硅膜和 使用卤代硅烷前体的金属掺杂氮化硅膜）。 本文所述的卤代硅烷前体化合物的实例包括但不限于一氯二硅烷（MCDS），一溴二硅烷（MBDS），一碘二硅烷（MIDS），一氯三硅烷（MCTS）和一溴三硅烷（MBTS），单碘三硅烷（MITS）。 本文还描述了一种用于沉积硅的方法，例如但不限于硅，非晶硅，氧化硅，氮化硅，碳化硅，氮氧化硅，碳氮化硅，掺杂的硅膜和金属掺杂的氮化硅膜 或更多的沉积温度为约500℃或更低。

公开(公告)号：WO2016198857A1

公开(公告)日：2016-12-15

申请号：PCT/GB2016/051688

申请日：2016-06-08

Applicant: P2I LTD

Inventor： COULSON, Stephen Richard ,  EVANS, Delwyn ,  SIOKOU, Angeliki ,  TELFORD, Clive

IPC: C09D5/00

CPC classification number: C09D133/16 ,  B05D1/62 ,  B05D5/08 ,  B05D5/083 ,  C09D5/00 ,  H01J37/32082 ,  H01J37/32467 ,  H01J2237/332 ,  H01J2237/3382 ,  H01L21/02118 ,  H01L21/02274 ,  H01L21/56 ,  H01L23/293 ,  H01L23/564 ,  H05K3/285

Abstract: The present invention provides an electronic or electrical device or component thereof comprising a cross-linked polymeric coating on a surface of the electronic or electrical device or component thereof; wherein the cross-linked polymeric coating is obtainable by exposing the electronic or electrical device or component thereof to a plasma comprising a monomer compound and a crosslinking reagent for a period of time sufficient to allow formation of the cross-linked polymeric coating on a surface thereof, wherein the monomer compound has the following formula: where R 1 , R 2 and R 4 are each independently selected from hydrogen, optionally substituted branched or straight chain C 1 -C 6 alkyl or halo alkyl or aryl optionally substituted by halo, and R 3 is selected from: or where each X is independently selected from hydrogen, a halogen, optionally substituted branched or straight chain C 1 -C 6 alkyl, halo alkyl or aryl optionally substituted by halo; and n 1 is an integer from to 27; and wherein the crosslinking reagent comprises two or more unsaturated bonds attached by means of one or more linker moieties and has a boiling point at standard pressure of less than 500°C.

Abstract translation: 本发明提供了一种电子或电气设备或其组件，其包括在电子或电气设备或其组件的表面上的交联聚合物涂层; 其中所述交联聚合物涂层可通过将所述电子或电气装置或其组分暴露于包含单体化合物和交联剂的等离子体的时间来获得，所述时间足以允许在其表面上形成所述交联聚合物涂层 其中所述单体化合物具有下式：其中R 1，R 2和R 4各自独立地选自氢，任选取代的支链或直链C 1 -C 6烷基或任选被卤素取代的卤代烷基或芳基，R 3选自：或 其中每个X独立地选自氢，卤素，任选取代的支链或直链C 1 -C 6烷基，任选被卤素取代的卤代烷基或芳基; n1是从27到27的整数。 并且其中所述交联试剂包含通过一个或多个接头部分连接的两个或更多个不饱和键，并且具有在小于500℃的标准压力下的沸点。

公开(公告)号：WO2016178991A1

公开(公告)日：2016-11-10

申请号：PCT/US2016/030095

申请日：2016-04-29

Applicant: APPLIED MATERIALS, INC.

Inventor： LI, Ning ,  SALY, Mark ,  THOMPSON, David ,  BALSEANU, Mihaela ,  XIA, Li-Qun

IPC: H01L21/205 ,  H01L21/306

CPC classification number: H01L21/0228 ,  C23C16/30 ,  C23C16/308 ,  C23C16/345 ,  C23C16/401 ,  C23C16/45553 ,  H01L21/02126 ,  H01L21/02167 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/31111

Abstract: Methods for the formation of SiCN, SiCO and SiCON films comprising cyclical exposure of a substrate surface to a silicon-containing gas, a carbon-containing gas and a plasma. Some embodiments further comprise the addition of an oxidizing agent prior to at least the plasma exposure.

Abstract translation: 用于形成SiCN，SiCO和SiCON膜的方法包括将衬底表面循环暴露于含硅气体，含碳气体和等离子体。 一些实施方案还包括在至少等离子体暴露之前加入氧化剂。

公开(公告)号：WO2016145337A1

公开(公告)日：2016-09-15

申请号：PCT/US2016/022058

申请日：2016-03-11

Applicant: EXOGENESIS CORPORATION ,  KIRKPATRICK, Sean, R. ,  SVRLUGA, Richard, C.

Inventor： KIRKPATRICK, Sean, R. ,  SVRLUGA, Richard, C.

IPC: C23C14/00 ,  H01L21/02

CPC classification number: H01L21/321 ,  C03C15/00 ,  C03C23/0055 ,  C03C2218/335 ,  C23C14/042 ,  C23C14/0605 ,  C23C14/5826 ,  H01J37/05 ,  H01J37/317 ,  H01J2237/006 ,  H01J2237/0812 ,  H01L21/02115 ,  H01L21/02238 ,  H01L21/02274 ,  H01L21/3065 ,  H01L21/3081 ,  H01L21/31105 ,  H01L21/31116

Abstract: A method of forming a patterned hard mask on a surface of a substrate uses an accelerated neutral beam with carbon atoms. The objects set forth above as well as further and other objects and advantages of the present invention are achieved by the various embodiment's of the invention described herein below.

Abstract translation: 在基板的表面上形成图案化硬掩模的方法使用具有碳原子的加速中性束。 上述目的以及本发明的其他目的和优点通过下面描述的本发明的各种实施例来实现。