公开(公告)号：WO2007081964A2

公开(公告)日：2007-07-19

申请号：PCT/US2007/000558

申请日：2007-01-10

Applicant: CREE, INC. ,  HARRIS, Christopher ,  BASCERI, Cem ,  GEHRKE, Thomas ,  BALKAS, Cengiz

Inventor： HARRIS, Christopher ,  BASCERI, Cem ,  GEHRKE, Thomas ,  BALKAS, Cengiz

IPC: H01L29/30

CPC classification number: H01L33/38 ,  H01L21/0475 ,  H01L23/367 ,  H01L23/3738 ,  H01L29/0657 ,  H01L29/1608 ,  H01L29/20 ,  H01L29/2003 ,  H01L29/417 ,  H01L33/0079 ,  H01L33/32 ,  H01L2924/0002 ,  H01L2924/10158 ,  H01L2933/0016 ,  H01L2924/00

Abstract: A dimpled substrate and method of making including a substrate of high thermal conductivity having a first main surface and a second main surface opposite the first main surface. Active epitaxial layers are formed on the first main surface of the substrate. Dimples are formed as extending from the second main surface into the substrate toward the first main surface. An electrical contact of low resistance material is disposed on the second main surface and within the dimples. A back contact of low resistance and low loss is thus provided while maintaining the substrate as an effective heat sink.

Abstract translation: 一种凹凸基板及其制造方法，包括具有第一主表面和与第一主表面相对的第二主表面的具有高导热性的基板。 在衬底的第一主表面上形成有源外延层。 凹坑形成为从第二主表面延伸到基板朝向第一主表面。 低电阻材料的电触点设置在第二主表面和凹坑内。 因此，在保持基板作为有效散热器的同时提供低电阻和低损耗的背接触。

公开(公告)号：WO2007011294A1

公开(公告)日：2007-01-25

申请号：PCT/SE2006/000902

申请日：2006-07-20

Applicant: CREE, INC. ,  HARRIS, Christopher ,  BASCERI, Cem

Inventor： HARRIS, Christopher ,  BASCERI, Cem

IPC: H01L29/06 ,  H01L21/20 ,  H01L21/22 ,  H01L21/26

CPC classification number: H01L29/872 ,  H01L29/0619 ,  H01L29/1608 ,  H01L29/66143

Abstract: A semiconductor device comprises a first layer (1) of a wide band gap semiconductor material doped according to a first conductivity type and a second layer (3) on top thereof designed to form a junction blocking current in the reverse biased state of the device at the interface to said first layer. The device comprises extension means for extending a termination of the junction laterally with respect to the lateral border (6) of the second layer. This extension means comprises a plurality of rings (16-21) in juxtaposition laterally surrounding said junction (15) and being arranged as seen in the lateral direction away from said junction alternatively a ring (16-18) of a semiconductor material of a second conductivity type opposite to that of said first layer and a ring (19-21) of a semi-insulating material.

Abstract translation: 半导体器件包括根据第一导电类型掺杂的宽带隙半导体材料的第一层（1）和在其顶部上的第二层（3），其被设计成在器件的反向偏压状态下形成结阻滞电流 与所述第一层的接口。 该装置包括用于相对于第二层的侧边缘（6）横向延伸接头终端的延伸装置。 这种延伸装置包括多个并排的环（16-21），其横向围绕所述接合部分（15）并且沿横向方向远离所述接头交替布置，交替地布置为第二部分的半导体材料的环（16-18） 与所述第一层相反的导电类型和半绝缘材料的环（19-21）。

公开(公告)号：WO2012061244A1

公开(公告)日：2012-05-10

申请号：PCT/US2011/058384

申请日：2011-10-28

Applicant: CREE, INC.

Inventor： HARRIS, Christopher ,  PENGELLY, Raymond Sydney

IPC: H04B1/04 ,  H03H7/40 ,  H03F1/56

CPC classification number: H03H7/38 ,  H03F1/0288 ,  H03F1/56 ,  H03F3/24 ,  H03F2200/222 ,  H03F2200/378 ,  H03F2200/387 ,  H03H7/40 ,  H04B1/0458

Abstract: The present disclosure relates to transmission circuitry of a wireless communication device. The transmission circuitry includes power amplifier circuitry, an output matching network, and impedance control circuitry. The power amplifier circuitry amplifies a radio frequency (RF) input signal to provide an amplified RF output signal, which is passed through the output matching network and transmitted via one or more antennas. As the center frequency of the RF input signal and conditions of operating parameters change, the impedance control circuitry adjusts the values of one or more variable impedance elements of the output matching network in a desired fashion. The values of the variable impedance elements are adjusted such that the output matching network concurrently and dynamically presents the desired load impedances at the center frequency and at one or more harmonics of the RF input signal to achieve a given performance specification.

Abstract translation: 本公开涉及无线通信设备的传输电路。 传输电路包括功率放大器电路，输出匹配网络和阻抗控制电路。 功率放大器电路放大射频（RF）输入信号以提供放大的RF输出信号，其被输送通过输出匹配网络并通过一个或多个天线发送。 随着RF输入信号的中心频率和操作参数的条件改变，阻抗控制电路以期望的方式调整输出匹配网络的一个或多个可变阻抗元件的值。 调整可变阻抗元件的值，使得输出匹配网络同时并且动态地呈现在RF输入信号的中心频率和一个或多个谐波处的期望的负载阻抗，以实现给定的性能规范。

公开(公告)号：WO2009073326A1

公开(公告)日：2009-06-11

申请号：PCT/US2008/083210

申请日：2008-11-12

Applicant: CREE, INC.

Inventor： KONSTANTINOV, Andrei ,  HARRIS, Christopher ,  SVEDERG, Jan-Olov

IPC: H01L29/78 ,  H01L21/336 ,  H01L29/24 ,  H01L29/423 ,  H01L29/417

CPC classification number: H01L29/7828 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/66666

Abstract: A short gate high power metal oxide semiconductor field effect transistor formed in a trench includes a short gate having gate length defined by spacers within the trench. The transistor further includes a buried region that extends beneath the trench and beyond a corner of the trench, that effectively shields the gate from high drain voltage, to prevent short channel effects and resultantly improve device performance and reliability.

Abstract translation: 形成在沟槽中的短栅极高功率金属氧化物半导体场效应晶体管包括具有由沟槽内的间隔物限定的栅极长度的短栅极。 晶体管还包括在沟槽下方延伸并超出沟槽的角部的掩埋区域，其有效地屏蔽栅极与高漏极电压，以防止短路效应并从而提高器件性能和可靠性。