公开(公告)号：WO2016130134A1

公开(公告)日：2016-08-18

申请号：PCT/US2015/015729

申请日：2015-02-13

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： JACKSON, Warren ,  YANG, Jianhua ,  KIM, Kyung Min ,  LI, Zhiyong

IPC: H01L27/115 ,  H01L21/8247

CPC classification number: H01L45/147 ,  G11C13/0007 ,  G11C13/0069 ,  G11C2013/0083 ,  G11C2213/73 ,  G11C2213/77 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/16

Abstract: A multilayered memristor includes a semiconducting n-type layer, a semiconducting p-type layer, and a semiconducting intrinsic layer. The semiconducting n-type layer includes one or both of anion vacancies and metal cations. The semiconducting p-type layer includes one or both of metal cation vacancies and anions. The semiconducting intrinsic layer is coupled between the n-type layer and the p-type layer to form an electrical series connection through the n-type layer, the intrinsic layer, and the p-type layer.

Abstract translation: 多层忆阻器包括半导体n型层，半导体p型层和半导体本征层。 半导体n型层包括阴离子空位和金属阳离子中的一个或两个。 半导体p型层包括金属阳离子空位和阴离子中的一种或两种。 半导体本征层耦合在n型层和p型层之间，以形成通过n型层，本征层和p型层的电串联连接。

公开(公告)号：WO2016159947A1

公开(公告)日：2016-10-06

申请号：PCT/US2015/023270

申请日：2015-03-30

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： JACKSON, Warren

IPC: H01L21/8247 ,  H01L27/115

CPC classification number: H01L45/1641 ,  G11C13/0007 ,  G11C2013/0083 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/146

Abstract: Examples relate to manufacturing memristors. The examples herein form a bottom electrode, form an active layer coupled to the bottom electrode, flood a surface of the active layer with charged particles, and form a top electrode coupled to the active layer. The charged surface of the active region induces formation of a conducting filament through the active layer.

Abstract translation: 示例涉及制造忆阻器。 本文的实例形成底部电极，形成耦合到底部电极的活性层，用带电粒子浸渍有源层的表面，并形成耦合到有源层的顶部电极。 有源区的带电表面通过有源层引起导电丝的形成。

公开(公告)号：WO2016122472A1

公开(公告)日：2016-08-04

申请号：PCT/US2015/013214

申请日：2015-01-28

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： YANG, Jianhua ,  GE, Ning ,  STRACHAN, John, Paul ,  GIBSON, Gary ,  JACKSON, Warren

IPC: G11C8/10 ,  G11C16/06

CPC classification number: G11C13/0069 ,  G11C13/0023 ,  G11C13/003 ,  G11C13/004 ,  G11C2213/73 ,  G11C2213/74 ,  G11C2213/76

Abstract: In one example, a volatile selector is switched from a low conduction state to a first high conduction state with a first voltage level and then the first voltage level is removed to activate a relaxation time for the volatile selector. The relaxation time is defined as the time the first volatile selector transitions from the high conduction state back to the low conduction state. The volatile selector is switched with a second voltage level of opposite polarity to the first voltage level to significantly reduce the relaxation time of the volatile selector.

Abstract translation: 在一个示例中，将易失性选择器从低导通状态切换到具有第一电压电平的第一高导通状态，然后去除第一电压电平以激活易失性选择器的松弛时间。 弛豫时间定义为第一易失性选择器从高导通状态转换回低导通状态的时间。 易失性选择器以与第一电压电平相反极性的第二电压电平切换，以显着减少易失性选择器的松弛时间。