公开(公告)号：WO2009137578A3

公开(公告)日：2010-03-04

申请号：PCT/US2009042983

申请日：2009-05-06

Applicant: SEMISOUTH LAB INC ,  SANKIN IGOR ,  SHERIDAN DAVID C ,  MERRETT JOSEPH NEIL

Inventor： SANKIN IGOR ,  SHERIDAN DAVID C ,  MERRETT JOSEPH NEIL

IPC: H01L29/78 ,  H01L21/336

CPC classification number: H01L29/8083 ,  H01L29/1058 ,  H01L29/1608 ,  H01L29/7392 ,  H01L29/7722

Abstract: Semiconductor devices are described wherein current flow in the device is confined between the rectifying junctions (e.g., p-n junctions or metal-semiconductor junctions). The device provides non-punch-through behavior and enhanced current conduction capability. The devices can be power semiconductor devices as such as Junction Field-Effect Transistors (VJFETs), Static Induction Transistors (SITs), Junction Field Effect Thyristors, or JFET current limiters. The devices can be made in wide bandgap semiconductors such as silicon carbide (SiC). According to some embodiments, the device can be a normally-off SiC vertical junction field effect transistor. Methods of making the devices and circuits comprising the devices are also described.

Abstract translation: 描述了半导体器件，其中器件中的电流被限制在整流结（例如，p-n结或金属半导体结）之间。 该器件提供非穿通行为和增强的电流传导能力。 器件可以是功率半导体器件，例如结型场效应晶体管（VJFET），静态感应晶体管（SIT），结型场效应晶闸管或JFET限流器。 器件可以用碳化硅（SiC）等宽带隙半导体制造。 根据一些实施例，该器件可以是常闭SiC垂直结型场效应晶体管。 还描述了制造包括器件的器件和电路的方法。

公开(公告)号：WO2009129049A3

公开(公告)日：2010-02-18

申请号：PCT/US2009039107

申请日：2009-04-01

Applicant: SEMISOUTH LAB INC ,  MERRETT JOSEPH NEIL ,  SANKIN IGOR

Inventor： MERRETT JOSEPH NEIL ,  SANKIN IGOR

IPC: H01L21/336 ,  H01L21/20 ,  H01L29/78

CPC classification number: H01L29/808 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/66901

Abstract: Methods of making a semiconductor device such as a lateral junction field effect transistor (JFET) are described. The methods are self-aligned and involve selective epitaxial growth using a regrowth mask material to form the gate or the source/drain regions of the device. The methods can eliminate the need for ion implantation. The device can be made from a wide band-gap semiconductor material such as SiC. The regrowth mask material can be TaC. The devices can be used in harsh environments including applications involving exposure to radiation and/or high temperatures.

Abstract translation: 描述制造诸如横向结型场效应晶体管（JFET）的半导体器件的方法。 这些方法是自对准的，并且涉及使用再生长掩模材料选择性地外延生长以形成器件的栅极或源极/漏极区域。 该方法可以消除离子注入的需要。 该器件可以由诸如SiC的宽带隙半导体材料制成。 再生面膜材料可以是TaC。 该设备可用于恶劣环境，包括涉及辐射和/或高温的应用。

公开(公告)号：WO2009009380A3

公开(公告)日：2009-03-05

申请号：PCT/US2008069043

申请日：2008-07-02

Applicant: SEMISOUTH LAB INC ,  SANKIN IGOR ,  MERRETT JOSEPH NEIL

Inventor： SANKIN IGOR ,  MERRETT JOSEPH NEIL

IPC: H01L27/098 ,  H01L21/04 ,  H01L21/8232 ,  H01L29/808 ,  H01L29/812

CPC classification number: H01L29/808 ,  H01L27/098 ,  H01L29/0619 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/8083 ,  H01L29/8122 ,  H01L29/8124 ,  H01L29/861 ,  H01L29/868 ,  H01L29/872 ,  H03K17/08142 ,  H03K17/08148 ,  H03K17/567 ,  H03K17/6871 ,  H03K2017/6875

Abstract: Wide bandgap semiconductor devices including normally-off VJFET integrated power switches are described. The power switches can be implemented monolithically or hybridly, and may be integrated with a control circuit built in a single-or multi-chip wide bandgap power semiconductor module. The devices can be used in high-power, temperature -tolerant and radiation-resistant electronics components. Methods of making the devices are also described.

Abstract translation: 描述了包括常关VJFET集成功率开关的宽带隙半导体器件。 功率开关可以单片或混合实现，并且可以与内置在单芯片或多芯片宽带隙功率半导体模块中的控制电路集成。 该器件可用于高功率，耐高温和抗辐射的电子元件。 还描述了制造这些装置的方法。

公开(公告)号：WO2007130505A2

公开(公告)日：2007-11-15

申请号：PCT/US2007010712

申请日：2007-05-01

Applicant: SEMISOUTH LAB INC ,  SANKIN IGOR ,  MERRETT JOSEPH NEIL

Inventor： SANKIN IGOR ,  MERRETT JOSEPH NEIL

CPC classification number: H01L29/872 ,  H01L29/0619 ,  H01L29/1608 ,  H01L29/868

Abstract: A wide bandgap semiconductor device with surge current protection and a method of making the device are described. The device comprises a low doped n-type region formed by plasma etching through the first epitaxial layer grown on a heavily doped n-type substrate and a plurality of heavily doped p-type regions formed by plasma etching through the second epitaxial layer grown on the first epitaxial layer. Ohmic contacts are formed on p-type regions and on the backside of the n-type substrate. Schottky contacts are formed on the top surface of the n-type region. At normal operating conditions, the current in the device flows through the Schottky contacts. The device, however, is capable of withstanding extremely high current densities due to conductivity modulation caused by minority carrier injection from p-type regions.

Abstract translation: 描述了具有浪涌电流保护的宽带隙半导体器件和制造该器件的方法。 该器件包括通过等离子体蚀刻形成的低掺杂n型区域，其通过在重掺杂n型衬底上生长的第一外延层和通过等离子体蚀刻形成的多个重掺杂p型区域形成，该区域通过在 第一外延层。 欧姆接触形成在p型区域和n型衬底的背面上。 在n型区域的顶表面上形成肖特基接触。 在正常工作条件下，器件中的电流流过肖特基触点。 然而，由于由p型区域的少数载流子注入引起的导电性调制，该器件能够承受极高的电流密度。