公开(公告)号：WO2017133776A1

公开(公告)日：2017-08-10

申请号：PCT/EP2016/052386

申请日：2016-02-04

Applicant: FRAUNHOFER-GESELLSCHAFT ZUR FÖRDERUNG DER ANGEWANDTEN FORSCHUNG E.V.

Inventor： VAN RAAY, Dr.-Ing. Friedbert

IPC: H03F3/24 ,  H03F1/02 ,  H03F1/56 ,  H03F3/195 ,  H03F3/42 ,  H03F3/45 ,  H03F3/60 ,  H03F1/52

CPC classification number: H03F3/211 ,  H01Q23/00 ,  H03F1/523 ,  H03F1/56 ,  H03F1/565 ,  H03F3/195 ,  H03F3/245 ,  H03F3/423 ,  H03F3/45183 ,  H03F3/45475 ,  H03F3/604 ,  H03F3/607 ,  H03F2200/06 ,  H03F2200/108 ,  H03F2200/135 ,  H03F2200/181 ,  H03F2200/222 ,  H03F2200/255 ,  H03F2200/297 ,  H03F2200/301 ,  H03F2200/315 ,  H03F2200/318 ,  H03F2200/387 ,  H03F2200/42 ,  H03F2200/423 ,  H03F2200/451 ,  H03F2200/48 ,  H03F2200/498 ,  H03F2200/75 ,  H03F2203/45138 ,  H03F2203/45148 ,  H03F2203/45151 ,  H03F2203/45156 ,  H03F2203/45166 ,  H03F2203/45202 ,  H03F2203/45208 ,  H03F2203/45224 ,  H03F2203/45258 ,  H03F2203/45338 ,  H03F2203/45458 ,  H03F2203/45488 ,  H03F2203/45496 ,  H03F2203/45528 ,  H03F2203/45544 ,  H03F2203/45594 ,  H03F2203/45631 ,  H03F2203/45696 ,  H03F2203/45702

Abstract: A power amplifier includes a two-dimensional matrix of NxM active cells formed by stacking main terminals of multiple active cells in series. The stacks are coupled in parallel to form the two-dimensional matrix. The power amplifier includes a driver structure to coordinate the driving of the active cells so that the effective output power of the two-dimensional matrix is approximately NxM the output power of each of the active cells.

Abstract translation: 功率放大器包括通过串联堆叠多个有源单元的主端子而形成的N×M个有源单元的二维矩阵。 这些堆栈被平行耦合以形成二维矩阵。 功率放大器包括驱动器结构以协调有源单元的驱动，使得二维矩阵的有效输出功率近似为N×M每个有源单元的输出功率。

公开(公告)号：WO2013020768A1

公开(公告)日：2013-02-14

申请号：PCT/EP2012/063486

申请日：2012-07-10

Applicant: TELEFONAKTIEBOLAGET L M ERICSSON (PUBL) ,  SJÖLAND, Henrik

Inventor： SJÖLAND, Henrik

IPC: H03F3/45 ,  H03F1/56 ,  H03F1/30 ,  H03F3/193

CPC classification number: H03F1/56 ,  H03F1/303 ,  H03F3/19 ,  H03F3/193 ,  H03F3/45071 ,  H03F3/45098 ,  H03F3/45183 ,  H03F3/45197 ,  H03F2200/222 ,  H03F2200/294 ,  H03F2200/447 ,  H03F2200/451 ,  H03F2200/468 ,  H03F2203/45458 ,  H03F2203/45461 ,  H03F2203/45464 ,  H03F2203/45488 ,  H03F2203/45544 ,  H03F2203/45554 ,  H03F2203/45562 ,  H03F2203/45622 ,  H03F2203/45638 ,  H03F2203/45702

Abstract: A differential cross-coupled common-source or common-emitter low-noise amplifier having capacitive degeneration is disclosed. Further, a radio receiver comprising such a low-noise amplifier is disclosed. Further, a method of controlling switched capacitive networks of an amplifier is disclosed. The method comprises controlling capacitances of the switched degeneration capacitor networks and/or the switched cross-coupling capacitor networks. Further, a computer program for implementing the method is disclosed.

Abstract translation: 公开了具有电容变性的差分交叉耦合共源或共发射极低噪声放大器。 此外，公开了一种包括这种低噪声放大器的无线电接收机。 此外，公开了一种控制放大器的开关电容网络的方法。 该方法包括控制开关退化电容器网络和/或开关交叉耦合电容器网络的电容。 此外，公开了一种用于实现该方法的计算机程序。

公开(公告)号：WO2002065226A1

公开(公告)日：2002-08-22

申请号：PCT/US2001/049749

申请日：2001-12-20

Applicant: INTERSIL AMERICAS INC.

Inventor： PRENTICE, John, S.

IPC: G05F3/16

CPC classification number: H03G1/0023 ,  H03F3/45085 ,  H03F3/45556 ,  H03F2203/45458 ,  H03F2203/45701 ,  H03G7/06

Abstract: An attenuator control circuit (103) for controlling operation of a differential pair attenuator (101) to provide linear in decibels (dB) operation and temperature and process-independent operation. The attenuator control circuit (103) is coupled in parallel with corresponding control input terminals VIN+, VIN- of the attenuator differential pair Q1, Q2. The attenuator control circuit also includes a current control circuit Q5-Q7, (204) that sources a supply current to the control differential pair Q3, Q4. The attenuator control circuit also includes an amplifier (203) that controls current through the first current path of the control differential pair to maintain constant total current IC3, IC4, so that the first current path exhibits the desired exponential attenuation function. Since the control differential pair is coupled in parallel with the differential pair attenuator, the output current of the differential pair attenuator also exhibits the desired exponential attenuation function. Furthermore, the attenuator control circuit includes a temperature compensation circuit (201) that applies a temperature proportional voltage VCNT to compensate for temperature variations.

Abstract translation: 一种用于控制差分对衰减器（101）的操作以提供线性分贝（dB）操作和温度和处理独立操作的衰减器控制电路（103）。 衰减器控制电路（103）与衰减器差动对Q1，Q2的相应控制输入端VIN +，VIN-并联耦合。 衰减器控制电路还包括电流控制电路Q5-Q7（204），其向控制差动对Q3，Q4提供电源电流。 衰减器控制电路还包括放大器（203），其控制通过控制差分对的第一电流路径的电流，以保持恒定的总电流IC3，IC4，使得第一电流路径呈现期望的指数衰减功能。 由于控制差分对与差分对衰减器并联耦合，所以差分对衰减器的输出电流也表现出期望的指数衰减函数。 此外，衰减器控制电路包括施加温度比例电压VCNT以补偿温度变化的温度补偿电路（201）。

公开(公告)号：WO2017083052A2

公开(公告)日：2017-05-18

申请号：PCT/US2016/056905

申请日：2016-10-13

Applicant: QUALCOMM INCORPORATED

Inventor： YUAN, Xiaobin ,  NATONIO, Joseph ,  BARTHOLOMEW, Kevin, Robert ,  PRASAD, Mangal

IPC: H03K19/0175 ,  H03F3/45

CPC classification number: H03G3/20 ,  H03F1/301 ,  H03F3/45197 ,  H03F3/45479 ,  H03F2203/45154 ,  H03F2203/45458 ,  H03F2203/45488 ,  H03F2203/45494 ,  H03G1/0023 ,  H03G1/0029 ,  H03G5/28 ,  H03K19/018514

Abstract: A voltage gain amplifier (VGA) configured to have reduced supply noise. The VGA includes first resistor, first FET, and a first current-source coupled between first and second voltage rails. The VGA includes second resistor, second FET, and second current-source coupled between the voltage rails. A variable resistor is coupled between the respective sources of the first and second FETs. Variable capacitors are coupled between the first or a third voltage rail and the sources of the first and second input FETs, respectively. If capacitors are coupled to the first voltage rail, noise cancellation occurs across the gate-to-source voltages of the FETs if an input differential signal applied to the gates of the FETs is derived from a supply voltage at the first voltage rail. If capacitors are coupled to the third rail, supply noise is reduced if the supply voltage at the third rail is generated by a cleaner regulator.

Abstract translation:

电压增益放大器（VGA），配置为降低电源噪声。 VGA包括第一电阻器，第一FET和耦合在第一和第二电压轨之间的第一电流源。 VGA包括第二电阻器，第二FET和耦合在电压轨之间的第二电流源。 可变电阻器耦合在第一和第二FET的相应源极之间。 可变电容器分别耦合在第一或第三电压轨与第一和第二输入FET的源极之间。 如果电容器耦合到第一电压轨，则如果施加到FET的栅极的输入差分信号是从第一电压轨处的电源电压导出的，则在FET的栅极到源极电压之间发生噪声消除。 如果电容耦合到第三轨，如果第三轨电源电压由更清洁的调节器产生，则电源噪声会降低。

公开(公告)号：WO03094344B1

公开(公告)日：2004-05-27

申请号：PCT/US0313493

申请日：2003-04-29

Applicant: ATHEROS COMM INC

Inventor： JEN HUNG-MIN ,  SU DAVID K

IPC: H03F3/45 ,  H03G1/00 ,  H03G3/28

CPC classification number: H03F3/45475 ,  H03F1/3211 ,  H03F3/211 ,  H03F3/45183 ,  H03F3/45632 ,  H03F3/72 ,  H03F2203/21175 ,  H03F2203/45138 ,  H03F2203/45318 ,  H03F2203/45332 ,  H03F2203/45458 ,  H03F2203/45464 ,  H03F2203/45512 ,  H03F2203/45702 ,  H03F2203/45704 ,  H03F2203/7221 ,  H03F2203/7236 ,  H03G1/0029

Abstract: The present invention provides a variable gain amplifier with a plurality of gain stages in which each of the gain stages is implemented using a circuit that implements a neutralization approach. This variable gain amplifier provides stable operation characteristics as different gain stages within the variable gain amplifier are turned on and off. This variable gain amplifier also increases linearity across the entire operating range. Additionally, the variable gain amplifier of the present invention provides a constant input impedance through different gain settings. Further, the present invention provides a variable gain amplifier in which each of the various gain stages therein maximize the available voltage swing. Finally, this variable gain amplifier improves common-mode rejection performance and attenuates unwanted harmonics.

Abstract translation: 本发明提供一种具有多个增益级的可变增益放大器，其中使用实现中和方式的电路来实现每个增益级。 该可变增益放大器提供稳定的操作特性，因为可变增益放大器内的不同增益级被打开和关闭。 该可变增益放大器还可以在整个工作范围内提高线性度。 此外，本发明的可变增益放大器通过不同的增益设置提供恒定的输入阻抗。 此外，本发明提供了一种可变增益放大器，其中各种增益级中的每个增益级中的可用电压摆幅​​最大化。 最后，该可变增益放大器提高了共模抑制性能，并衰减了不需要的谐波。

公开(公告)号：WO1981001780A1

公开(公告)日：1981-06-25

申请号：PCT/US1980001644

申请日：1980-12-10

Applicant: GENERAL ELECTRIC CO

Inventor： GENERAL ELECTRIC CO ,  ERICKSON B

IPC: H03F03/45

CPC classification number: H03F3/45197 ,  H03D5/00 ,  H03F1/48 ,  H03F3/191 ,  H03F3/45098 ,  H03F3/45103 ,  H03F2203/45311 ,  H03F2203/45318 ,  H03F2203/45458 ,  H03F2203/45464 ,  H03F2203/45471 ,  H03F2203/45501 ,  H03F2203/45544 ,  H03F2203/45548 ,  H03F2203/45596 ,  H03F2203/45702 ,  H03G3/3052

Abstract: Bandpass amplifier (10) comprises first and second transistors (12, 19) in a differential amplifier configuration, however with separated emitters. Individual first and second current source circuits (16, 17; 22, 23) are provided. A piezoelectric resonator or filter (30) is connected across the separated emitters, and is preferably shunted by an inductance (31) to neutralize the static capacitance of the resonator (30). Application is as interstage between AM-mixer and IF amplifier of AM or AM/FM radio receiver, with filter (30) resonant at the AM IF (455Khz). This permits introduction (at 33a) of unfiltered output of AM mixer, and also provides IF preamplification. AGC, or fixed bias may be applied (at 18a) to the current sources.

公开(公告)号：WO2017083052A3

公开(公告)日：2017-06-15

申请号：PCT/US2016056905

申请日：2016-10-13

Applicant: QUALCOMM INC

Inventor： YUAN XIAOBIN ,  NATONIO JOSEPH ,  BARTHOLOMEW KEVIN ROBERT ,  PRASAD MANGAL

IPC: H03K19/0175 ,  H03F3/45

CPC classification number: H03G3/20 ,  H03F1/301 ,  H03F3/45197 ,  H03F3/45479 ,  H03F2203/45154 ,  H03F2203/45458 ,  H03F2203/45488 ,  H03F2203/45494 ,  H03G1/0023 ,  H03G1/0029 ,  H03G5/28 ,  H03K19/018514

Abstract: A voltage gain amplifier (VGA) configured to have reduced supply noise. The VGA includes first resistor, first FET, and a first current-source coupled between first and second voltage rails. The VGA includes second resistor, second FET, and second current-source coupled between the voltage rails. A variable resistor is coupled between the respective sources of the first and second FETs. Variable capacitors are coupled between the first or a third voltage rail and the sources of the first and second input FETs, respectively. If capacitors are coupled to the first voltage rail, noise cancellation occurs across the gate-to-source voltages of the FETs if an input differential signal applied to the gates of the FETs is derived from a supply voltage at the first voltage rail. If capacitors are coupled to the third rail, supply noise is reduced if the supply voltage at the third rail is generated by a cleaner regulator.

Abstract translation: 电压增益放大器（VGA）配置为降低电源噪声。 VGA包括第一电阻器，第一FET和耦合在第一和第二电压轨之间的第一电流源。 VGA包括第二电阻器，第二FET和耦合在电压轨之间的第二电流源。 可变电阻器耦合在第一和第二FET的相应源极之间。 可变电容器分别耦合在第一或第三电压轨与第一和第二输入FET的源极之间。 如果电容器耦合到第一电压轨，则如果施加到FET的栅极的输入差分信号是从第一电压轨处的电源电压导出的，则在FET的栅极到源极电压之间发生噪声消除。 如果电容耦合到第三轨，如果第三轨电源电压由更清洁的调节器产生，则电源噪声会降低。

公开(公告)号：WO2008019285A2

公开(公告)日：2008-02-14

申请号：PCT/US2007/075055

申请日：2007-08-02

Applicant: AXIOM MICRODEVICES, INC. ,  AOKI, Ichiro

Inventor： AOKI, Ichiro

IPC: H03C1/00 ,  H03C3/00 ,  H03G3/00 ,  H03K5/08

CPC classification number: H03C5/00 ,  H03F1/12 ,  H03F1/3205 ,  H03F1/3211 ,  H03F1/342 ,  H03F3/19 ,  H03F3/245 ,  H03F3/45201 ,  H03F2200/102 ,  H03F2200/451 ,  H03F2200/75 ,  H03F2200/78 ,  H03F2200/99 ,  H03F2203/45458 ,  H03F2203/45492 ,  H03G1/007 ,  H03G1/04 ,  H03G3/3042 ,  H03G3/3047

Abstract: A limiter for minimizing an amount of phase change caused by input amplitude variation includes a variable gain amplifier configured to receive a signal having an amplitude component and a phase component and having a gain controlled by a compensation capacitance and a variable resistance, in which the compensation capacitance minimizes an effect of parasitic capacitance and the variable resistance adjusts a gain in the variable gain amplifier such that the amplitude component at an output of the variable gain amplifier remains substantially constant.

Abstract translation: 用于最小化由输入幅度变化引起的相位变化量的限制器包括：可变增益放大器，被配置为接收具有幅度分量和相位分量并具有由补偿电容控制的增益的信号;以及 可变电阻，其中补偿电容使寄生电容的影响最小化，并且可变电阻调整可变增益放大器中的增益，使得可变增益放大器的输出处的振幅分量保持基本恒定。

公开(公告)号：WO2002067414A1

公开(公告)日：2002-08-29

申请号：PCT/JP2002/001539

申请日：2002-02-21

Applicant: 新潟精密株式会社 ,  宮城 弘

Inventor： 宮城 弘

IPC: H03F3/195

CPC classification number: H03F3/45645 ,  H03F3/16 ,  H03F3/193 ,  H03F3/195 ,  H03F2200/168 ,  H03F2200/54 ,  H03F2203/45051 ,  H03F2203/45458 ,  H03F2203/45526 ,  H03F2203/45631 ,  H03F2203/45652

Abstract: An FET band amplifier for providing a high gain. An FET band amplifier (5) included in an AM receiver comprises amplifiers (11-15) e.g. at five stages and a BPF (16) inserted halfway in their connection. Each of the amplifiers (11-15) acts as a differential amplifier comprising a p-channel FET as an amplification element. The BPF (16) allows the passage of a component of a band wider than the amplification band of the whole of the FET band amplifier and reduces a 1/f noise by removing the low-band component of a signal amplified by the amplifiers (11-13) at three stages and thermal noise by removing the high-band component. Thus, each of the amplifiers (14, 15) connected to the rear stage of the BPF (16) is not saturated by a noise component.

Abstract translation: 用于提供高增益的FET带放大器。 包括在AM接收机中的FET带放大器（5）包括放大器（11-15），例如 在五个阶段和一个BPF（16）插入连接中途。 每个放大器（11-15）用作包括作为放大元件的p沟道FET的差分放大器。 BPF（16）允许通过比整个FET带放大器的放大频带宽的频带的分量，并通过去除由放大器（11）放大的信号的低频分量来降低1 / f噪声 -13），通过去除高频带分量的热噪声。 因此，连接到BPF（16）的后级的每个放大器（14,15）不被噪声分量饱和。

公开(公告)号：WO02015394A1

公开(公告)日：2002-02-21

申请号：PCT/DE2001/003094

申请日：2001-08-15

IPC: H03F3/45

CPC classification number: H03F3/45251 ,  H03F3/45237 ,  H03F3/4565 ,  H03F2203/45418 ,  H03F2203/45458 ,  H03F2203/45476 ,  H03F2203/45631

Abstract: The invention relates to a differential complementary amplifier that comprises two MOSFET amplifier branches (1, 2). According to the invention, the second amplifier branch (2) is operated in the opposite sense relative to the first amplifier branch (1). The outputs of the two amplifier branches (1, 2) form a differential output and are interlinked in a node (A) via a load resistor (R1, R2). The operating point of the two amplifier branches (1, 2) is adjusted via the voltage applied to said node (A). The invention provides a fully differential, highly symmetrical amplifier circuit in which both amplifier branches are used as amplifiers and a signal is derived from said amplifier branches to stabilize the operating point.

Abstract translation: 本发明涉及一种差速器，互补放大器，这两个MOSFET放大器分支（1,2）。 根据本发明，第二放大器分支（2）相对所述第一放大器分支（1）在相反方向上操作时，两个放大路径的输出（1，2）形成在一个节点的差动输出并经由负载电阻器（R1，R2）分别输出（A ）彼此连接。 上施加到两个放大器路径的工作点的在该节点（A）电压（1，2）被设置。 本发明提供一种全差分，高度对称的放大器电路是可用的，其中两个放大器分支用作放大器和信号导出用于两个放大器分支的工作点稳定。