Abstract:
Embodiments of the invention are generally directed to messaging to provide data link integrity. An embodiment of a method includes transmitting a data stream over a data link from a first device to a second device, the data stream including multiple frames, the data stream being transmitted in a first mode. The method further includes determining a data transmission mode change from the first mode to a second mode for the transmission of the data stream from the first device to the second device, generating mode packets, each mode packet including fields to define a plurality of mode elements, the fields of the mode packet being set to indicate the data transmission mode change, and transmitting the mode packets to the second device prior to implementing the data transmission mode change.
Abstract:
A transmitting apparatus (20) for transmitting transmission data to a receiving apparatus is disclosed which includes: means (22) for obtaining apparatus information of the receiving apparatus; a source (27) of video data and its auxiliary data; means (21) for determining whether or not the video data and the auxiliary data are synthesized with each other, based on the obtained apparatus information; means (23) for synthesizing, according to the above determination, the video data and frame data which is the auxiliary data associated with a frame of the video data, to generate the transmission data, wherein the frame data is included in a video data arranging area of the video data; and means (24) for transmitting the transmission data to the receiving apparatus. Furthermore, a receiving apparatus is also disclosed which extracts the frame data from the video data arranging area of received data.
Abstract:
Method and apparatus for encoding and decoding a stream of digital (binary) data on AGC (automatic gain control) pulses or back porch pulses of the type conventionally used for copy protection in the analog television or video realm. The data is encoded onto the tips of the AGC or back porch pulses added to blanking intervals of an analog video signal. Each pulse tip may define, for instance, 10 to 15 digital bits (1 or 0) in the form of square waves or rectangular waves with two states, high and low, representing respectively 1 and 0. In another version, the digital data is similarly encoded onto the pulse tip of back porch pulses present at the end of video fields for copy protection. This digital data conveyed in an analog signal may be read by an associated decoder in a consumer device and the resulting data decoded, for instance, for copy control, storage permission, network access, user identification, or carrying additional data, such as commentary or text relevant to the accompanying video. The data bandwidth here is substantial since each AGC or back porch pulse may carry, for instance, 15 bits of digital data and the AGC or back porch pulses may be present in each of the horizontal and vertical blanking intervals of a video signal.
Abstract:
The vertical blanking period is an idle period in video transmission that was originally intended for allowing the trace back of an electron beam to its point of origin. When sending the video signal over a wireless channel, the wireless channel may remain free of transmission of data during this period. However, in wireless transmission of a video signal in general, and in the transmission of an essentially uncompressed video signal in particular, there is a need to use all the bandwidth available, especially when transmitting a high-definition video signal. Therefore, a method is taught for using the vertical blanking period of a video signal for modem maintenance.
Abstract:
The present invention relates to a serial interface transmission system with more than one data line, in which the transmitted data has in-band and out-of-band characters. More particularly, the present invention relates to methods and systems for sending side channel data over a high-speed digital communications link. One embodiment of the invention provides a high-speed digital transmitter (20) capable of sending side channel data. The transmitter (20) includes a channel zero encoder (50a), a multiplexer (90), data enable out control logic (92), and a channel one encoder (52a). Another embodiment of the invention provides a high-speed digital receiver (60) capable of receiving side channel data. The receiver (60) includes a channel zero decoder (50b), a channel one decoder (52b), DEI signal and FIFO control signal recovery logic (199), and a channel one de-multiplexer (140).
Abstract:
The present invention relates to a serial interface transmission system with more than one data line, in which the transmitted data has in-band and out-of-band characters. More particularly, the present invention relates to methods and systems for sending side channel data over a high-speed digital communications link, e.g., a video link. One embodiment of the invention provides a high-speed digital transmitter capable of sending side channel data. The transmitter includes a channel zero encoder, a multiplexer, data enable out (DE out ) control logic, and a channel one encoder. The channel one encoder receives input from the channel one multiplexer and the channel one DE out control logic. Another embodiment of the invention provides a high-speed digital receiver capable of receiving side channel data. The receiver includes a channel zero decoder, a channel one decoder, DEI signal and FIFO control signal recovery logic, and a channel one de-multiplexer. The DEI signal and FIFO control signal recovery logic receives input from the channel one decoder. Similarly, the channel one demultiplexer receives input from the channel one decoder.
Abstract:
Systems and processes for including spread spectrum transmissions within television and radio broadcast channels without substantial degradation of the broadcast programming. The spread spectrum transmissions may carry components of the same television or radio programming, they may be the same programming, or they may be content that is unrelated to the programming. Disclosed are systems and processes for accomplishing such spread spectrum transmissions in a manner that compensates for robustness of signal components, by among other things time varying and/or varying frequency of the spread spectrum transmissions. Also disclosed are systems and processes for abating carrier signals to compensate for the effects of the spread spectrum transmissions in the channel. Further disclosed are systems and processes for conducting such transmissions in a cellular communications system.
Abstract:
A system for synchronizing data streams meant to be displayed concurrently at an end station, but delivered by separate delivery networks is disclosed. In one aspect, apparatus and methods for marking one of the data streams relative to the other are taught, including insertion of frame numbers in vertical and horizontal blanking intervals, the numbers referring to frames in the other stream and related to timing markers, and inserting such numbers by pixel data alteration. In another aspect, apparatus and methods are taught for receiving and re-synchronizing the data streams at a delivery point, including decoding of the relationship data inserted in one data stream referring to the other data stream. Re-synchronization is accomplished by controlling the separate data streams in separate buffer pipelines by a single controller. In a preferred embodiment one data stream is a live video data stream and the other is an annotation stream having added material to be displayed with the live video data stream.
Abstract:
In a Multiplexed Analog Component (MAC) color television transmission system in which the MAC signal is to be converted at the receiver to a composite color television signal having a 227.5 fH color subcarrier, frequency-generation equipment required at the receiver is simplified, and bandwidth is extended, by selecting the various frequencies in accordance with the following relationship: f0 = 3f1 = 3f2 = 2f4 = 1365k fH where f0 is the master clock frequency generated by a master clock (401), f1 is the luminance sampling frequency, and f2 is the chrominance sampling frequency generated by a frequency divider circuit (403); f4 is the MAC sampling frequency generated by a second frequency divider circuit (402), fH is the horizontal line frequency, and k is a positive integer greater than 2, f3 is the data clock frequency which is independent of k and remains fixed at its present value.