Invention Grant
- Patent Title: Self-aligned finFET formation
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Application No.: US15876606Application Date: 2018-01-22
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Publication No.: US10263099B2Publication Date: 2019-04-16
- Inventor: Cheng Chi , Fee Li Lie , Chi-Chun Liu , Ruilong Xie
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION , GLOBALFOUNDRIES, Inc.
- Applicant Address: US NY Armonk KY Grand Cayman
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION,GLOBALFOUNDRIES.INC
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION,GLOBALFOUNDRIES.INC
- Current Assignee Address: US NY Armonk KY Grand Cayman
- Agency: Cantor Colburn LLP
- Agent Vazken Alexanian
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/8234 ; H01L27/088 ; H01L29/78 ; H01L29/06 ; H01L21/033 ; H01L21/3105 ; H01L21/3065 ; H01L21/308 ; H01L29/08 ; H01L29/16 ; H01L29/161 ; H01L29/22 ; H01L29/49 ; H01L29/51

Abstract:
A method for fabricating a semiconductor device comprises forming a first hardmask, a planarizing layer, and a second hardmask on a substrate. Removing portions of the second hardmask and forming alternating blocks of a first material and a second material over the second hardmask. The blocks of the second material are removed to expose portions of the planarizing layer. Exposed portions of the planarizing layer and the first hardmask are removed to expose portions of the first hardmask. Portions of the first hardmask and portions of the substrate are removed to form a first fin and a second fin. Portions of the substrate are removed to further increase the height of the first fin and substantially remove the second fin. A gate stack is formed over a channel region of the first fin.
Public/Granted literature
- US20180158931A1 SELF-ALIGNED FINFET FORMATION Public/Granted day:2018-06-07
Information query
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