Invention Grant
- Patent Title: CVD metal seed layer
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Application No.: US14803445Application Date: 2015-07-20
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Publication No.: US10276397B2Publication Date: 2019-04-30
- Inventor: Ya-Ling Lee , Lin-Jung Wu , Victor Y. Lu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Potashnik, LLC
- Main IPC: H01L21/311
- IPC: H01L21/311 ; H01L21/288 ; H01L21/768 ; H01L21/285 ; H01L23/532

Abstract:
The present disclosure relates to an improved method of forming interconnection layers to reduce voids and improve reliability, and an associated device. In some embodiments, a dielectric layer is formed over a semiconductor substrate having an opening arranged within the dielectric layer. A metal seed layer is formed on the surfaces of the opening using a chemical vapor deposition (CVD) process. Then a metal layer is plated onto the metal seed layer to fill the opening. Forming the metal seed layer using a CVD process provides the seed layer with a good uniformity, which allows for high aspect ratio openings in the dielectric layer to be filled without voids or pinch off.
Public/Granted literature
- US20170005038A1 CVD METAL SEED LAYER Public/Granted day:2017-01-05
Information query
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