公开(公告)号：US09472502B1

公开(公告)日：2016-10-18

申请号：US14798996

申请日：2015-07-14

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ya-Ling Lee ,  Wen-Cheng Yang ,  Victor Y. Lu

IPC: H01L23/532 ,  H01L21/768 ,  H01L23/522 ,  H01L23/528

CPC classification number: H01L21/76873 ,  H01L21/28518 ,  H01L21/28556 ,  H01L21/76843 ,  H01L21/76855 ,  H01L23/485 ,  H01L23/53266

Abstract: Some embodiments relate to a method of manufacturing an integrated circuit device. In this method a dielectric layer is formed over a substrate. The dielectric layer comprises an opening arranged within the dielectric layer. A first cobalt liner is formed along bottom and sidewall surfaces of the opening. A barrier liner is formed on exposed surfaces of the first cobalt liner. A bulk cobalt layer is formed in the opening and over the barrier liner to fill a remaining space of the opening.

Abstract translation: 一些实施例涉及制造集成电路器件的方法。 在该方法中，在衬底上形成介电层。 电介质层包括布置在电介质层内的开口。 沿着开口的底部和侧壁表面形成第一钴衬垫。 阻挡衬垫形成在第一钴衬垫的暴露表面上。 在开口中和隔离衬里上形成体积钴层以填充开口的剩余空间。

公开(公告)号：US10811263B2

公开(公告)日：2020-10-20

申请号：US16730343

申请日：2019-12-30

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Ya-Ling Lee ,  Shing-Chyang Pan ,  Keng-Chu Lin ,  Wen-Cheng Yang ,  Chih-Tsung Lee ,  Victor Y. Lu

IPC: H01L21/285 ,  H01L21/8234 ,  H01L21/3065 ,  H01L21/02 ,  H01L21/768

Abstract: A method for forming a semiconductor device structure is provided. The method includes disposing a semiconductor substrate in a physical vapor deposition (PVD) chamber and introducing a plasma-forming gas into the PVD chamber. The plasma-forming gas is an oxygen-containing gas. The method also includes applying a radio frequency (RF) power by a power source to a metal target in the PVD chamber to excite the plasma-forming gas to generate plasma. The metal target is directly electrically coupled to the power source. The method further includes directing the plasma towards the metal target positioned in the PVD chamber such that an etch stop layer is formed over the semiconductor substrate.

公开(公告)号：US10276397B2

公开(公告)日：2019-04-30

申请号：US14803445

申请日：2015-07-20

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ya-Ling Lee ,  Lin-Jung Wu ,  Victor Y. Lu

IPC: H01L21/311 ,  H01L21/288 ,  H01L21/768 ,  H01L21/285 ,  H01L23/532

Abstract: The present disclosure relates to an improved method of forming interconnection layers to reduce voids and improve reliability, and an associated device. In some embodiments, a dielectric layer is formed over a semiconductor substrate having an opening arranged within the dielectric layer. A metal seed layer is formed on the surfaces of the opening using a chemical vapor deposition (CVD) process. Then a metal layer is plated onto the metal seed layer to fill the opening. Forming the metal seed layer using a CVD process provides the seed layer with a good uniformity, which allows for high aspect ratio openings in the dielectric layer to be filled without voids or pinch off.

公开(公告)号：US10522360B2

公开(公告)日：2019-12-31

申请号：US15730934

申请日：2017-10-12

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ya-Ling Lee ,  Shing-Chyang Pan ,  Keng-Chu Lin ,  Wen-Cheng Yang ,  Chih-Tsung Lee ,  Victor Y. Lu

IPC: H01L21/285 ,  H01L21/8234 ,  H01L21/3065 ,  H01L21/02 ,  H01L21/768

Abstract: A method for forming a semiconductor device structure is provided. The method includes disposing a semiconductor substrate in a physical vapor deposition (PVD) chamber. The method also includes introducing a plasma-forming gas into the PVD chamber, and the plasma-forming gas contains an oxygen-containing gas. The method further includes applying a radio frequency (RF) power to a metal target in the PVD chamber to excite the plasma-forming gas to generate plasma. In addition, the method includes directing the plasma towards the metal target positioned in the PVD chamber such that an etch stop layer is formed over the semiconductor substrate.

公开(公告)号：US20170005038A1

公开(公告)日：2017-01-05

申请号：US14803445

申请日：2015-07-20

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ya-Ling Lee ,  Lin-Jung Wu ,  Victor Y. Lu

IPC: H01L23/532 ,  H01L21/311 ,  H01L21/285 ,  H01L21/288 ,  H01L21/768

CPC classification number: H01L21/31111 ,  H01L21/28556 ,  H01L21/28568 ,  H01L21/2885 ,  H01L21/76802 ,  H01L21/76843 ,  H01L21/76856 ,  H01L21/76873 ,  H01L21/76879 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/5329 ,  H01L2221/1063

Abstract: The present disclosure relates to an improved method of forming interconnection layers to reduce voids and improve reliability, and an associated device. In some embodiments, a dielectric layer is formed over a semiconductor substrate having an opening arranged within the dielectric layer. A metal seed layer is formed on the surfaces of the opening using a chemical vapor deposition (CVD) process. Then a metal layer is plated onto the metal seed layer to fill the opening. Forming the metal seed layer using a CVD process provides the seed layer with a good uniformity, which allows for high aspect ratio openings in the dielectric layer to be filled without voids or pinch off.

Abstract translation: 本公开涉及形成互连层以减少空隙并提高可靠性的改进方法，以及相关联的装置。 在一些实施例中，在具有布置在电介质层内的开口的半导体衬底之上形成电介质层。 使用化学气相沉积（CVD）工艺在开口的表面上形成金属种子层。 然后将金属层镀在金属种子层上以填充开口。 使用CVD工艺形成金属种子层使得种子层具有良好的均匀性，这允许电介质层中的高纵横比开口被填充而没有空隙或夹断。