Invention Grant
- Patent Title: Advanced fall through mechanism for low power sequencers
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Application No.: US15484669Application Date: 2017-04-11
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Publication No.: US10338655B2Publication Date: 2019-07-02
- Inventor: Sarbartha Banerjee , Manisha Singh , Vinay Jain , Venkata Devarasetty
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Loza & Loza, LLP/Qualcomm
- Main IPC: G06F1/00
- IPC: G06F1/00 ; G06F1/26 ; G06F13/24 ; G06F1/3287 ; G06F1/30 ; G06F9/38 ; G06F1/3203 ; G06F1/3206 ; G06F9/48

Abstract:
Aspects of the disclosure are directed to DC power management. A sequencer may be configured to execute a first command, wherein the first command is associated with a unique group tag; compare the unique group tag to a master group tag; determine if an interrupt is detected; lock the master group tag to yield a locked master group tag; execute a second command, wherein the second command is associated with the locked master group tag; determine that an end of commands in the locked master group tag is reached and execute a sequence jump through command to put a processor back to a regular power state.
Public/Granted literature
- US20180292875A1 ADVANCED FALL THROUGH MECHANISM FOR LOW POWER SEQUENCERS Public/Granted day:2018-10-11
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