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公开(公告)号:US10338655B2
公开(公告)日:2019-07-02
申请号:US15484669
申请日:2017-04-11
Applicant: QUALCOMM Incorporated
Inventor: Sarbartha Banerjee , Manisha Singh , Vinay Jain , Venkata Devarasetty
IPC: G06F1/00 , G06F1/26 , G06F13/24 , G06F1/3287 , G06F1/30 , G06F9/38 , G06F1/3203 , G06F1/3206 , G06F9/48
Abstract: Aspects of the disclosure are directed to DC power management. A sequencer may be configured to execute a first command, wherein the first command is associated with a unique group tag; compare the unique group tag to a master group tag; determine if an interrupt is detected; lock the master group tag to yield a locked master group tag; execute a second command, wherein the second command is associated with the locked master group tag; determine that an end of commands in the locked master group tag is reached and execute a sequence jump through command to put a processor back to a regular power state.
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公开(公告)号:US10417161B2
公开(公告)日:2019-09-17
申请号:US16219698
申请日:2018-12-13
Applicant: QUALCOMM Incorporated
Inventor: Helena Deirdre O'Shea , Lalan Jee Mishra , Amit Gil , Gary Chang , Mohit Kishore Prasad , Richard Dominic Wietfeldt , Vinay Jain
Abstract: In a device comprising a serial bus and a plurality of devices, register/address mappings and/or unique group identifiers are used to convey additional information in messages/datagrams over the serial bus without explicitly sending such information in the message/datagram. Such register/address mappings may be done beforehand, and in conjunction with group-specific identifiers, may reduce transmission latency by keeping the size of the messages/datagrams small. Since all devices on the serial bus have prior knowledge of such register/address mappings and/or group-specific identifiers, recipient devices are able to infer information from the group-specific identifiers and/or register/address sent in each message/datagram that is not explicitly sent within such message/datagram.
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公开(公告)号:US20180292875A1
公开(公告)日:2018-10-11
申请号:US15484669
申请日:2017-04-11
Applicant: QUALCOMM Incorporated
Inventor: Sarbartha Banerjee , Manisha Singh , Vinay Jain , Venkata Devarasetty
CPC classification number: G06F1/266 , G06F1/305 , G06F1/3203 , G06F1/3206 , G06F1/3287 , G06F9/3851 , G06F9/4812 , G06F13/24
Abstract: Aspects of the disclosure are directed to DC power management. A sequencer may be configured to execute a first command, wherein the first command is associated with a unique group tag; compare the unique group tag to a master group tag; determine if an interrupt is detected; lock the master group tag to yield a locked master group tag; execute a second command, wherein the second command is associated with the locked master group tag; determine that an end of commands in the locked master group tag is reached and execute a sequence jump through command to put a processor back to a regular power state.
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