Invention Grant
- Patent Title: Integrated fan-out packages
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Application No.: US15876227Application Date: 2018-01-22
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Publication No.: US10347574B2Publication Date: 2019-07-09
- Inventor: Shin-Puu Jeng , Dai-Jang Chen , Hsiang-Tai Lu , Hsien-Wen Liu , Chih-Hsien Lin , Shih-Ting Hung , Po-Yao Chuang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- Main IPC: H01L23/49
- IPC: H01L23/49 ; H01L23/31 ; H01L25/04 ; H01L25/07 ; H01L25/11 ; H01L23/498 ; H01L21/66 ; H01L25/065 ; H01L21/56 ; H01L23/00 ; H01L25/00 ; H01L23/538 ; H01L23/373 ; H01L25/075 ; H01L23/36 ; H01L23/367

Abstract:
Integrated fan-out packages and methods of forming the same are disclosed. An integrated fan-out package includes a first semiconductor chip, a plurality of through integrated fan-out vias, an encapsulation layer and a redistribution layer structure. The first semiconductor chip includes a heat dissipation layer, and the heat dissipation layer covers at least 30 percent of a first surface of the first semiconductor chip. The through integrated fan-out vias are aside the first semiconductor chip. The encapsulation layer encapsulates the through integrated fan-out vias. The redistribution layer structure is at a first side of the first semiconductor chip and thermally connected to the heat dissipation layer of the first semiconductor chip.
Public/Granted literature
- US20190096791A1 INTEGRATED FAN-OUT PACKAGES AND METHODS OF FORMING THE SAME Public/Granted day:2019-03-28
Information query
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