Invention Grant
- Patent Title: Integrated circuit memory devices having impurity-doped dielectric regions therein and methods of forming same
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Application No.: US16001975Application Date: 2018-06-07
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Publication No.: US10411034B2Publication Date: 2019-09-10
- Inventor: Woo Jin Jang , Young Jin Noh , Jun Kyu Yang , Bio Kim , Kyong Won An
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Myers Bigel, P.A.
- Priority: KR10-2017-0155585 20171121
- Main IPC: H01L27/11582
- IPC: H01L27/11582 ; H01L21/28 ; H01L29/06 ; H01L29/10 ; H01L29/51 ; H01L23/528 ; H01L21/311 ; H01L21/3115 ; H01L21/02 ; H01L23/522 ; H01L27/11565
Abstract:
An integrated circuit memory device includes a vertical stack structure containing an interlayer insulating layer and a gate electrode, on a substrate. A blocking dielectric region is provided on a sidewall of an opening in the stack structure. A lateral impurity region is provided, which extends between the blocking dielectric region and the interlayer insulating layer and between the blocking dielectric region and the gate electrode. A lower impurity region is also provided, which extends between the blocking dielectric region and the substrate.
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