Invention Grant
- Patent Title: FinFET-based split gate non-volatile flash memory with extended source line FinFET, and method of fabrication
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Application No.: US16208288Application Date: 2018-12-03
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Publication No.: US10797142B2Publication Date: 2020-10-06
- Inventor: Serguei Jourba , Catherine Decobert , Feng Zhou , Jinho Kim , Xian Liu , Nhan Do
- Applicant: Silicon Storage Technology, Inc.
- Applicant Address: US CA San Jose
- Assignee: Silicon Storage Technology, Inc.
- Current Assignee: Silicon Storage Technology, Inc.
- Current Assignee Address: US CA San Jose
- Agency: DLA Piper LLP (US)
- Main IPC: H01L29/423
- IPC: H01L29/423 ; H01L27/11521 ; H01L29/08 ; H01L29/10 ; H01L29/66 ; H01L29/78 ; H01L29/788 ; H01L21/027 ; H01L21/308 ; H01L21/3105 ; G11C16/04 ; G11C16/10 ; G11C16/14 ; G11C16/26

Abstract:
A memory cell is formed on a semiconductor substrate having an upper surface with a plurality of upwardly extending fins. First and second fins extend in one direction, and a third fin extends in an orthogonal direction. Spaced apart source and drain regions are formed in each of the first and second fins, defining a channel region extending there between in each of the first and second fins. The source regions are disposed at intersections between the third fin and the first and second fins. A floating gate is disposed laterally between the first and second fins, and laterally adjacent to the third fin, and extends along first portions of the channel regions. A word line gate extends along second portions of the channel regions. A control gate is disposed over the floating gate. An erase gate is disposed over the source regions and the floating gate.
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