Invention Grant
- Patent Title: Fin cut and fin trim isolation for advanced integrated circuit structure fabrication
-
Application No.: US16925573Application Date: 2020-07-10
-
Publication No.: US11063133B2Publication Date: 2021-07-13
- Inventor: Tahir Ghani , Byron Ho , Curtis W. Ward , Michael L. Hattendorf , Christopher P. Auth
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt P.C.
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/78 ; H01L27/088 ; H01L21/762 ; H01L29/06 ; H01L21/8234 ; H01L21/768 ; H01L23/522 ; H01L23/532 ; H01L29/165 ; H01L29/417 ; H01L21/033 ; H01L21/28 ; H01L21/285 ; H01L21/308 ; H01L21/311 ; H01L21/8238 ; H01L23/528 ; H01L27/092 ; H01L27/11 ; H01L49/02 ; H01L29/08 ; H01L29/51 ; H01L27/02 ; H01L21/02 ; H01L29/167 ; H01L23/00

Abstract:
Embodiments of the disclosure are in the field of advanced integrated circuit structure fabrication and, in particular, 10 nanometer node and smaller integrated circuit structure fabrication and the resulting structures. In an example, an integrated circuit structure includes a fin. A first isolation structure separates a first end of a first portion of the fin from a first end of a second portion of the fin, the first end of the first portion of the fin having a depth. A gate structure is over the top of and laterally adjacent to the sidewalls of a region of the first portion of the fin. A second isolation structure is over a second end of a first portion of the fin, the second end of the first portion of the fin having a depth different than the depth of the first end of the first portion of the fin.
Public/Granted literature
- US20200343366A1 FIN CUT AND FIN TRIM ISOLATION FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATION Public/Granted day:2020-10-29
Information query
IPC分类: