Invention Grant
- Patent Title: Wall for isolation enhancement
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Application No.: US16517043Application Date: 2019-07-19
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Publication No.: US11089673B2Publication Date: 2021-08-10
- Inventor: Andrew Southworth , Kevin Wilder , James Benedict , Mary K. Herndon , Thomas V. Sikina , John P. Haven
- Applicant: RAYTHEON COMPANY
- Applicant Address: US MA Waltham
- Assignee: RAYTHEON COMPANY
- Current Assignee: RAYTHEON COMPANY
- Current Assignee Address: US MA Waltham
- Agency: Cantor Colburn LLP
- Main IPC: H05K1/02
- IPC: H05K1/02 ; H05K1/09 ; H05K1/11 ; H05K1/14 ; H05K3/00 ; H05K3/04 ; H05K3/10 ; H05K3/22 ; H05K3/34 ; H05K3/36 ; H05K3/40 ; H05K3/46 ; H01L21/00 ; H01L21/205 ; H01L23/48 ; H01L23/60 ; H01L23/522 ; H01L23/528 ; H05K9/00 ; H01Q1/38 ; H01Q1/52 ; H05K3/30

Abstract:
A circuit assembly is provided and includes a printed circuit board (PCB) having a circuit element region and defining a trench surrounding an entirety of the circuit element region, a circuit element disposed within the circuit element region of the PCB; and a Faraday wall. The Faraday wall includes a solid, unitary body having a same shape as the trench. The Faraday wall is disposed within the trench to surround an entirety of the circuit element.
Public/Granted literature
- US20210022238A1 WALL FOR ISOLATION ENHANCEMENT Public/Granted day:2021-01-21
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