Invention Grant
- Patent Title: Write merging on stores with different privilege levels
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Application No.: US17842257Application Date: 2022-06-16
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Publication No.: US11803486B2Publication Date: 2023-10-31
- Inventor: Naveen Bhoria , Timothy David Anderson , Pete Hippleheuser
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Brian D. Graham; Frank D. Cimino
- Main IPC: G06F12/0895
- IPC: G06F12/0895 ; G06F12/0888 ; G06F12/0891 ; G06F9/54 ; G06F12/02 ; G06F12/0811 ; G06F12/128 ; G06F12/0817 ; G06F12/0804 ; G06F9/30 ; G11C7/10 ; G11C29/42 ; G11C29/44 ; G06F11/10 ; G06F12/0855 ; G06F12/12 ; G06F12/0806 ; G06F12/0815 ; G06F12/0853 ; G06F13/16 ; G06F12/121 ; G06F12/0884 ; G06F12/0897 ; G06F12/0864 ; G11C7/22 ; G11C5/06 ; G06F15/80 ; G06F12/0802 ; G06F12/126

Abstract:
A caching system including a first sub-cache, a second sub-cache, coupled in parallel with the first sub-cache, for storing write-memory commands that are not cached in the first sub-cache, the second sub-cache including privilege bits configured to store an indication that a corresponding cache line of the second sub-cache is associated with a level of privilege, and wherein the second sub-cache is further configured to receive a first write memory command for a memory address associated with a first level of privilege, store, in the second sub-cache, first data associated with the first write memory command and the level of privilege associated with the cache line, receive a second write memory command for the cache line, the second write memory command associated with a second level of privilege, merge the first level of privilege with the second level of privilege, and output the merged privilege level with the cache line.
Public/Granted literature
- US20220309004A1 WRITE MERGING ON STORES WITH DIFFERENT PRIVILEGE LEVELS Public/Granted day:2022-09-29
Information query
IPC分类: