Invention Grant
- Patent Title: Calibration scheme for filling lookup table in an ADC
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Application No.: US17467561Application Date: 2021-09-07
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Publication No.: US11881867B2Publication Date: 2024-01-23
- Inventor: Narasimhan Rajagopal , Eeshan Miglani , Chirag Chandrahas Shetty , Neeraj Shrivastava , Shagun Dusad , Srinivas Kumar Reddy Naru , Nithin Gopinath , Charls Babu , Shivam Srivastava , Viswanathan Nagarajan , Jagannathan Venkataraman , Harshit Moondra , Prasanth K , Visvesvaraya Appala Pentakota
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Valerie M. Davis; Frank D. Cimino
- Priority: IN 2141004382 2021.02.01
- Main IPC: H03M1/10
- IPC: H03M1/10

Abstract:
In described examples, a circuit includes a calibration engine. The calibration engine generates multiple input codes. A digital to analog converter (DAC) is coupled to the calibration engine, and generates a first calibration signal in response to a first input code of the multiple input codes. An analog to digital converter (ADC) is coupled to the DAC, and generates multiple raw codes responsive to the first calibration signal. A storage circuit is coupled to the ADC and stores a first output code corresponding to the first input code. The first output code is obtained using the multiple raw codes generated by the ADC.
Public/Granted literature
- US20220247420A1 CALIBRATION SCHEME FOR FILLING LOOKUP TABLE IN AN ADC Public/Granted day:2022-08-04
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