Invention Application
- Patent Title: APPROACHES FOR STRAIN ENGINEERING OF PERPENDICULAR MAGNETIC TUNNEL JUNCTIONS (PMTJS) AND THE RESULTING STRUCTURES
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Application No.: US16070415Application Date: 2016-03-30
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Publication No.: US20190027679A1Publication Date: 2019-01-24
- Inventor: Daniel G. OUELLETTE , Christopher J. WIEGAND , MD Tofizur RAHMAN , Brian MAERTZ , Oleg GOLONZKA , Justin S. BROCKMAN , Kevin P. O'BRIEN , Brian S. DOYLE , Kaan OGUZ , Tahir GHANI , Mark L. DOCZY
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- International Application: PCT/US2016/024898 WO 20160330
- Main IPC: H01L43/02
- IPC: H01L43/02 ; H01L27/22 ; H01L43/08 ; H01L43/12 ; H01L43/10

Abstract:
Approaches for strain engineering of perpendicular magnetic tunnel junctions (pMTJs), and the resulting structures, are described. In an example, a memory structure includes a perpendicular magnetic tunnel junction (pMTJ) element disposed above a substrate. A lateral strain-inducing material layer is disposed on the pMTJ element. An inter-layer dielectric (ILD) layer is disposed laterally adjacent to both the pMTJ element and the lateral strain-inducing material layer. The ILD layer has an uppermost surface co-planar or substantially co-planar with an uppermost surface of the lateral strain-inducing material layer.
Information query
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