- 专利标题: CHASSIS INTERCONNECT FOR AN ELECTRONIC DEVICE
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申请号: US16903845申请日: 2020-06-17
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公开(公告)号: US20210100101A1公开(公告)日: 2021-04-01
- 发明人: Chee How Lim , Eng Huat Goh , Jon Sern Lim , Khai Ern See , Min Suet Lim , Tin Poay Chuah , Yew San Lim
- 申请人: Intel Corporation
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 优先权: MYPI2019005754 20190930
- 主分类号: H05K1/14
- IPC分类号: H05K1/14 ; H05K1/11 ; H01R12/61
摘要:
An electronic device may include a chassis. The electronic device may include a first electronic component that may include a first substrate and a first interconnect. The electronic device may include a second electronic component that may include a second substrate and a second interconnect. The second substrate may be physically separated from the first substrate. An electrical trace may be coupled to the chassis of the electronic device. The electrical trace may be sized and shaped to interface with the first interconnect of the first electronic component. The electrical trace may be sized and shaped to interface with the second interconnect of the second electronic component. The first electronic component and the second electronic component may be in electrical communication through the electrical trace coupled to the chassis of the electronic device.
公开/授权文献
- US11445608B2 Chassis interconnect for an electronic device 公开/授权日:2022-09-13
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