- 专利标题: Power MOS transistor having capability for setting substrate potential independently of source potential
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申请号: US10160098申请日: 2002-06-04
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公开(公告)号: US07109558B2公开(公告)日: 2006-09-19
- 发明人: Takashi Nakano , Satoshi Shiraki , Yutaka Fukuda , Nobumasa Ueda , Shoji Miura
- 申请人: Takashi Nakano , Satoshi Shiraki , Yutaka Fukuda , Nobumasa Ueda , Shoji Miura
- 申请人地址: JP Kariya
- 专利权人: Denso Corporation
- 当前专利权人: Denso Corporation
- 当前专利权人地址: JP Kariya
- 代理机构: Posz Law Group, PLC
- 优先权: JP2001-170861 20010606; JP2001-390431 20011221
- 主分类号: H01L29/76
- IPC分类号: H01L29/76 ; H01L29/94 ; H01L31/062 ; H01L31/113 ; H01L31/119
摘要:
A power MOS transistor formed of an array of source cells and drain cells on an IC chip substrate has a plurality of substrate contact cells, each formed external to the source cells, having respective substrate potential-setting electrodes to which an externally supplied substrate bias voltage can be applied, enabling the substrate potential to be set independently of the source potential of the transistor. It thereby becomes possible to modify the threshold voltage of the transistor or maintain a constant potential difference between the substrate potential and that of a gate input signal. Since the requirement for a substrate contact region within each source cell is eliminated, and the number of substrate contact cells can be fewer than that of the source cells, the chip area occupied by the transistor can be reduced by comparison with a prior art configuration providing such a substrate potential control capability.
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