发明授权
US07678655B2 Spacer layer etch method providing enhanced microelectronic device performance
有权
间隔层蚀刻方法提供增强的微电子器件性能
- 专利标题: Spacer layer etch method providing enhanced microelectronic device performance
- 专利标题(中): 间隔层蚀刻方法提供增强的微电子器件性能
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申请号: US11495348申请日: 2006-07-28
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公开(公告)号: US07678655B2公开(公告)日: 2010-03-16
- 发明人: Hung Der Su , Ju-Wang Hsu , Yi-Chun Huang , Shien-Yang Wu , Yung-Shun Chen , Tung-Heng Shie , Yuan-Hung Chiu , Jyh-Huei Chen , Jhon Jhy Liaw
- 申请人: Hung Der Su , Ju-Wang Hsu , Yi-Chun Huang , Shien-Yang Wu , Yung-Shun Chen , Tung-Heng Shie , Yuan-Hung Chiu , Jyh-Huei Chen , Jhon Jhy Liaw
- 申请人地址: TW Hsin-Chu
- 专利权人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人地址: TW Hsin-Chu
- 代理机构: Thomas, Kayden, Horstemeyer & Risley
- 主分类号: H01L21/336
- IPC分类号: H01L21/336
摘要:
A method for forming a field effect transistor device employs a conformal spacer layer formed upon a gate electrode. The gate electrode is employed as a mask for forming a lightly doped extension region within the semiconductor substrate and the gate electrode and conformal spacer layer are employed as a mask for forming a source/drain region within the semiconductor substrate. An anisotropically etched shaped spacer material layer is formed upon the conformal spacer layer and isotropically etched to enhance exposure of the source/drain region prior to forming a silicide layer thereupon.
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