Invention Grant
US09362283B2 Gate structures for transistor devices for CMOS applications and products
有权
用于CMOS应用和产品的晶体管器件的栅极结构
- Patent Title: Gate structures for transistor devices for CMOS applications and products
- Patent Title (中): 用于CMOS应用和产品的晶体管器件的栅极结构
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Application No.: US14793005Application Date: 2015-07-07
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Publication No.: US09362283B2Publication Date: 2016-06-07
- Inventor: Zhendong Hong , Susie Tzeng , Amol Joshi , Ashish Bodke , Divya Pisharoty , Usha Raghuram , Olov Karlsson , Kisik Choi , Salil Mujumdar , Paul R. Besser , Jinping Liu , Hoon Kim
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Amerson Law Firm, PLLC
- Main IPC: H01L27/00
- IPC: H01L27/00 ; H01L29/00 ; H01L27/092 ; H01L21/28 ; H01L29/51 ; H01L29/66 ; H01L21/8238 ; H01L29/49
Abstract:
An integrated circuit product includes an NMOS transistor having a gate structure that includes an NMOS gate insulation layer, a first NMOS metal layer positioned on the NMOS gate insulation layer, an NMOS metal silicide material positioned above the first NMOS metal layer, and a layer of a second metal material positioned above and in contact with the NMOS gate insulation layer, the first NMOS metal layer, and the NMOS metal silicide layer. The PMOS transistor has a gate structure that includes a PMOS gate insulation layer, a first PMOS metal layer positioned on the PMOS gate insulation layer, a PMOS metal silicide material positioned above the first PMOS metal layer, and a layer of the second metal material positioned above and in contact with the PMOS gate insulation layer, the first PMOS metal layer, and the PMOS metal silicide layer.
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