- 专利标题: Physical interface for a serial interconnect
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申请号: US14580918申请日: 2014-12-23
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公开(公告)号: US09779053B2公开(公告)日: 2017-10-03
- 发明人: Debendra Das Sharma , Daniel S. Froelich , Venkatraman Iyer , Michelle C. Jen , Rahul R. Shah , Eric M. Lee
- 申请人: Intel Corporation
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: International IP Law Group, P.L.L.C.
- 主分类号: G06F13/38
- IPC分类号: G06F13/38 ; G06F13/40 ; G06F13/42 ; G06F13/16
摘要:
An apparatus that includes a physical interface for a serial interconnect is provided. The physical interface includes a buffer that is selectable to function as a drift buffer or an elastic buffer by a voltage level on a buffer control line. The physical interface also includes encoding logic that can be enabled or disabled by a voltage level on a logic control line. Further, the physical interface also includes and an ordered set generator that can be enabled or disabled by a voltage level on a communications control line.
公开/授权文献
- US20160179710A1 PHYSICAL INTERFACE FOR A SERIAL INTERCONNECT 公开/授权日:2016-06-23