公开(公告)号：US20160179710A1

公开(公告)日：2016-06-23

申请号：US14580918

申请日：2014-12-23

申请人： Intel Corporation

发明人： Debendra Das Sharma ,  Daniel S. Froelich ,  Venkatraman Iyer ,  Michelle C. Jen ,  Rahul R. Shah ,  Eric M. Lee

IPC分类号： G06F13/16 ,  G06F13/42

CPC分类号： G06F13/4068 ,  G06F13/1642 ,  G06F13/1673 ,  G06F13/385 ,  G06F13/4282

摘要： An apparatus that includes a physical interface for a serial interconnect is provided. The physical interface includes a buffer that is selectable to function as a drift buffer or an elastic buffer by a voltage level on a buffer control line. The physical interface also includes encoding logic that can be enabled or disabled by a voltage level on a logic control line. Further, the physical interface also includes and an ordered set generator that can be enabled or disabled by a voltage level on a communications control line.

摘要翻译： 提供了一种包括用于串行互连的物理接口的装置。 物理接口包括缓冲器，其可选择用作缓冲器控制线上的电压电平的漂移缓冲器或弹性缓冲器。 物理接口还包括可由逻辑控制线上的电压电平启用或禁用的编码逻辑。 此外，物理接口还包括可以通过通信控制线上的电压电平启用或禁用的有序集发生器。

公开(公告)号：US09779053B2

公开(公告)日：2017-10-03

申请号：US14580918

申请日：2014-12-23

申请人： Intel Corporation

发明人： Debendra Das Sharma ,  Daniel S. Froelich ,  Venkatraman Iyer ,  Michelle C. Jen ,  Rahul R. Shah ,  Eric M. Lee

IPC分类号： G06F13/38 ,  G06F13/40 ,  G06F13/42 ,  G06F13/16

CPC分类号： G06F13/4068 ,  G06F13/1642 ,  G06F13/1673 ,  G06F13/385 ,  G06F13/4282

摘要： An apparatus that includes a physical interface for a serial interconnect is provided. The physical interface includes a buffer that is selectable to function as a drift buffer or an elastic buffer by a voltage level on a buffer control line. The physical interface also includes encoding logic that can be enabled or disabled by a voltage level on a logic control line. Further, the physical interface also includes and an ordered set generator that can be enabled or disabled by a voltage level on a communications control line.