Invention Grant
- Patent Title: Semiconductor structure with insertion layer and method for manufacturing the same
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Application No.: US15369460Application Date: 2016-12-05
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Publication No.: US09960246B2Publication Date: 2018-05-01
- Inventor: Cheng-Wei Lian , Chih-Lin Wang , Kang-Min Kuo , Chih-Wei Lin
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/51 ; H01L21/28 ; H01L29/66

Abstract:
A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a substrate, an interfacial layer formed over the substrate, and an insertion layer formed over the interfacial layer. The semiconductor structure further includes a gate dielectric layer formed over the insertion layer and a gate structure formed over the gate dielectric layer. The insertion layer and the gate dielectric layer may be metal oxides where the insertion layer has an oxygen coordination number greater than the gate dielectric layer.
Public/Granted literature
- US20170110555A1 SEMICONDUCTOR STRUCTURE WITH INSERTION LAYER AND METHOD FOR MANUFACTURING THE SAME Public/Granted day:2017-04-20
Information query
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