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    USE OF MONOLITHIC WIRELESS TRANSMITTER WITH SWITCHED CAPACITOR CONVERTER TO DESIGN HEATER FOR E-CIGARETTE
    2.
    发明公开
    USE OF MONOLITHIC WIRELESS TRANSMITTER WITH SWITCHED CAPACITOR CONVERTER TO DESIGN HEATER FOR E-CIGARETTE 审中-公开

    公开(公告)号：EP4456667A1

    公开(公告)日：2024-10-30

    申请号：EP24169867.9

    申请日：2024-04-12

    申请人： STMicroelectronics International N.V.

    发明人： LEONG, Foo Leng ,  LI, Yanlei ,  YANG, Wanli

    IPC分类号： H05B6/06 ,  H05B6/10

    摘要： Disclosed herein is an electronic device (10) including a switched capacitor circuit (102) generating a boosted voltage (Vboost) from a battery voltage (Vbatt) and a monolithic transmitter (103) integrated within a single integrated circuit substrate (103). The monolithic transmitter includes a bridge (104) powered between the boosted voltage and a reference voltage and is operated based upon bridge control signals (HS_AC1, LS_AC1, HS_AC2, LS_AC2) generated by a digital core (105) within the monolithic transmitter. A tank capacitor (Ctank) and a coil (112) are series connected between output nodes of the bridge. During operation, the monolithic transmitter causes generation of a time-varying magnetic field about the coil, in turn inducing eddy currents in a workpiece (1122) disposed within the time-varying magnetic field to thereby heat the workpiece.

    NFC CONTROLLER
    3.
    发明公开
    NFC CONTROLLER 审中-公开

    公开(公告)号：EP4456439A1

    公开(公告)日：2024-10-30

    申请号：EP24170141.6

    申请日：2024-04-15

    申请人： STMicroelectronics International N.V.

    发明人： GRUNDRICH, Christophe ,  KOVACIC, Kosta ,  LEDUC, Bruno

    IPC分类号： H04B5/72 ,  H04B5/79 ,  H02J7/34

    摘要： The present disclosure relates to an NFC controller comprising a first node (NVBAT) configured to be coupled to a battery; a second node (NVDD_TX) configured to receive a regulated voltage from an external dc/dc converter coupled to said first node ; a third node (RF01, RF02) configured to be coupled to an radiofrequency output of the NFC controller; said third node been configured to, in a first mode, be coupled either to the first or second nodes, and in a second mode, either to the first node or to first and second nodes.

    SEMICONDUCTOR PACKAGE, METHOD OF FORMING SEMICONDUCTOR PACKAGE, AND POWER MODULE
    4.
    发明公开
    SEMICONDUCTOR PACKAGE, METHOD OF FORMING SEMICONDUCTOR PACKAGE, AND POWER MODULE 审中-公开

    公开(公告)号：EP4456132A1

    公开(公告)日：2024-10-30

    申请号：EP24171773.5

    申请日：2024-04-23

    申请人： Shenzhen STS Microelectronics Co., Ltd. ,  STMicroelectronics International N.V.

    发明人： LIU, Qian ,  TIZIANI, Roberto

    IPC分类号： H01L23/64 ,  H01L23/31 ,  H01L25/07 ,  H01L23/48

    摘要： Embodiments of the present disclosure relate to a semiconductor package, a method of forming semiconductor package and a power module. For example, there is provided a semiconductor package. The semiconductor package may comprise a chip level having a first side and a second side opposite to the first side, wherein the chip level comprises a plurality of power transistors and each power transistor is provided with a source and a gate at the first side. Besides, the semiconductor package may also comprise a first conductive level positioned on the first side and comprising a gate connection portion electrically connected with the gate and a source connection portion electrically connected with the source. The semiconductor package further comprises a second conductive level comprising a gate lead-out portion electrically connected with the gate connection portion and a source lead-out portion electrically connected with the source connection portion, wherein the first conductive level is positioned between the second conductive level and the chip level. Embodiments of the present disclosure may enhance the working performance of the product by improving consistency of conductive paths from the gate and the source of each power transistor to corresponding points.

    DELTA-SIGMA MODULATOR WITH ANTI-WINDUP CIRCUIT
    5.
    发明公开
    DELTA-SIGMA MODULATOR WITH ANTI-WINDUP CIRCUIT 审中-公开

    公开(公告)号：EP4451568A1

    公开(公告)日：2024-10-23

    申请号：EP24163598.6

    申请日：2024-03-14

    申请人： STMicroelectronics International N.V.

    发明人： STILGENBAUER, Francesco ,  BOTTI, Edoardo ,  MALCOVATI, Piero ,  CROVETTI, Paolo Stefano ,  BONIZZONI, Edoardo ,  DE FERRARI, Matteo

    IPC分类号： H03M3/00 ,  H03M7/32

    摘要： A delta-sigma modulator (110) includes a loop filter circuit (114) having a first input that receives an input signal (102) and a second input that receives a feedback signal (105). The loop filter (114) circuit generates a filtered signal (106). A quantizer circuit (124) quantizes the filtered signal (106) to generate an output signal (103). An anti-windup circuit (112) detects instances where the filtered signal (106) is outside an input signal input of the quantizer circuit (124) and in response thereto generates a dead zone signal (107) having a magnitude and sign corresponding to a difference between the filtered signal and the input signal range. The feedback signal (105) is a sum of the output signal (103) and the dead zone signal (107).

    MULTI-LEVEL POWER MODULE WITH REDUCED PARASITIC EFFECTS
    8.
    发明公开
    MULTI-LEVEL POWER MODULE WITH REDUCED PARASITIC EFFECTS 审中-公开

    公开(公告)号：EP4439660A1

    公开(公告)日：2024-10-02

    申请号：EP24164787.4

    申请日：2024-03-20

    申请人： STMicroelectronics International N.V.

    发明人： SUTERA, Dario

    IPC分类号： H01L23/495 ,  H01L25/07

    CPC分类号： H01L23/49562 ,  H01L23/49575 ,  H01L23/49517 ,  H01L25/071 ,  H01L25/072 ,  H01L23/49537 ,  H01L23/3107 ,  H01L23/051

    摘要： A power module (21) includes an insulating body (30) having a first main face (30a) and a second main face (30b); a first contact plate (27) and a second contact plate (28), respectively protruding through the first main face (30a) and through the second main face (30b) of the insulating body (30) and accessible from the outside of the power module (21); a first power plate (31) and a second power plate (33), at least partially embedded in the insulating body (30), facing each other and having plane faces perpendicular to a first direction (Z). Power devices (22) of a first group (21a) are accommodated on the first power plate (31) and coupled to the first contact plate (27). Power devices (22) of a second group (21b) are accommodated on the second power plate (33) and coupled to the second contact plate (28). The first contact plate (27), the second contact plate (28), the first power plate (31) and the second power plate (33), are stacked along the first direction (Z) .