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280 条记录 (耗时 0.02 秒)

    RECHARGEABLE ELECTROCHEMICAL APPARATUS AND NEGATIVE POLE THEREFOR
    101.
    发明授权
    RECHARGEABLE ELECTROCHEMICAL APPARATUS AND NEGATIVE POLE THEREFOR 失效
    可充电的电化学设备及其负极

    公开(公告)号：EP0139756B1

    公开(公告)日：1990-09-19

    申请号：EP84901017.8

    申请日：1984-03-06

    申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.

    发明人： TOYOGUCHI, Yoshinori ,  YAMAURA, Junichi ,  MATSUI, Tooru ,  IIJIMA, Takashi

    IPC分类号： H01M4/38 ,  H01M4/40 ,  H01M4/42 ,  H01M4/44

    CPC分类号： H01M4/13 ,  H01M4/40 ,  H01M4/661 ,  H01M10/36

    摘要： A rechargeable negative pole for an electrochemical apparatus using a non-aqueous electrolyte is made of an alloy consisting essentially of one element selected from the group of Sn, Pb, In and Bi, with Zn or Zn and Cd. A rechargeable electrochemical apparatus is provided with a combination of this negative pole and a positive pole, and can be reversibly charged. When immersed in a non-aqueous electrolyte containing alkali metal ions, the negative pole reversibly occludes and emits the alkali metal ions by this charge and discharge. The negative pole has a long charge-and-discharge life, since however many times the charge and discharge is repeated, the negative pole is not fragmented, and the negative pole maintains its electrode configuration stably. In addition, since the amount of alkali metal occluded per unit volume is large, the energy density is high.

    Optical materials from intercalation of polyvalent cations in beta double prime alumina
    106.
    发明授权
    Optical materials from intercalation of polyvalent cations in beta double prime alumina 失效
    从BETA双重原子核中的多价位交联的光学材料

    公开(公告)号：EP0132321B1

    公开(公告)日：1987-09-02

    申请号：EP84304400.9

    申请日：1984-06-28

    申请人： UNIVERSITY PATENTS, INC.

    发明人： Farrington, Gregory ,  Dunn, Bruce S.

    IPC分类号： C30B31/04 ,  C30B31/08 ,  C30B29/22

    CPC分类号： C30B31/04 ,  C30B29/22 ,  C30B31/02 ,  C30B31/08

    摘要： Beta double prime alumina is provided having a sensible amount of at least one polyvalent cationic species intercalated therein. In accordance with a preferred embodiment, such beta double prime alumina is provided having trivalent and/or tetravalent cationic species intercalated therein, especially species derived from the lanthanide and actinide series of elements. Certain of the foregoing materials exhibit phosphorescence or fluorescence, and some are believed to be capable of producing laser emission upon suitable irradiation. Methods for modifying beta double prime aluminas comprising contacting crystals of the aluminas with polyvalent cation-containing salts such as in the molten state or in the gaseous state are also provided. Laser and other optical devies are disclosed employing the modified beta double prime aluminas of this invention.

    Alu and condition code control unit for data processor
    107.
    发明公开
    Alu and condition code control unit for data processor 失效
    算术逻辑单元和单元，用于存储在处理单元的条件指令。

    公开(公告)号：EP0221191A1

    公开(公告)日：1987-05-13

    申请号：EP84103253.5

    申请日：1980-04-30

    申请人： MOTOROLA, INC.

    发明人： Tredennick, Harry Leslie ,  Gunter, Thomas Glen

    IPC分类号： G06F9/26

    CPC分类号： G06F9/30094 ,  G06F9/262 ,  G06F9/264 ,  G06F9/268 ,  G06F9/30 ,  G06F9/30061 ,  G06F9/30145 ,  G06F9/30167

    摘要： A data processor which is adapted for microprogrammed operation has a control store includes an ALU and condition code control unit for controlling operations performed by an arithmetic-logic unit within the execution unit of the data processor and for controlling the setting of the condition code bits in a status register. The ALU and condition code control unit is arranged in a row and column format. A decoder coupled to a macroinstruction register selects a row which is selected over an entire period that is required to execute macroinstruction. The row corresponds to a set of operations and condition code settings associated with a particular macroinstruction. The control store output provides information for selecting the proper column during each microcycle used to execute the macroinstruction. ALU function control signals and the condition code control signals are selected simultaneously according to the selected row and column.

    摘要翻译： 一种数据处理器，所有这些是angepasst用于编程手术微具有控制存储包括在ALU和条件码控制单元，用于控制数据处理器的执行单元内执行通过算术逻辑单元来执行操作和控制的条件码位的在设置 状态寄存器。 的ALU和条件码控制单元以行和列格式排列。 耦合到一个宏指令寄存器A解码器选择的行被选择到整个期间所有没被执行宏指令必需的。 该行对应一组与特定的宏指令相关的操作和条件码设置的。 控制存贮器输出提供用于用于执行宏指令每个微周期期间选择适当的列的信息。 ALU功能控制信号和条件码的控制信号被选择同时gemäß到选定的行和列。

    Conditional branch unit for microprogrammed data processor
    108.
    发明公开
    Conditional branch unit for microprogrammed data processor 失效
    Bedingte Verzweigungseinheitfüreine mikroprogrammierte Datenverarbeitungsanlage。

    公开(公告)号：EP0211962A1

    公开(公告)日：1987-03-04

    申请号：EP84103272.5

    申请日：1980-04-30

    申请人： MOTOROLA, INC.

    发明人： Tredennick, Harry Leslie ,  Gunter, Thomas Glen

    IPC分类号： G06F9/26 ,  G06F9/32

    CPC分类号： G06F9/30094 ,  G06F9/262 ,  G06F9/264 ,  G06F9/268 ,  G06F9/30 ,  G06F9/30061 ,  G06F9/30145 ,  G06F9/30167

    摘要： A data processor having a microprogrammed control store and including a conditional branch control unit for receiving selection bits output by the control store, selection bits from an instruction register, and conditional signals for generating a two-bit result which, when added to a base address, can specify one of two, three, or four branch destinations in the control store. The selection bits output by the control store determine whether the combination of conditional signals upon which the branch is dependent is selected by the control store or is selected directly by a bit field in the macroinstruction. Also, one of the selection bits output by the control store is used to select one of two possible output codes for the two-bit result associated with a particular branch destination. The latter feature allows for two conditional branch points in the control store to test for the same condition and to select the same destination when the tested condition is of one logic state while selecting different destinations when the tested condition is of the opposite logic state.

    摘要翻译： 具有微程序控制存储的数据处理器，包括用于接收由控制存储器输出的选择位的条件转移控制单元，来自指令寄存器的选择位，以及用于产生两位结果的条件信号，当被加到基址 ，可以在控制存储中指定两个，三个或四个分支目的地之一。 由控制存储器输出的选择位确定控制存储器是否选择分支依赖的条件信号的组合，或者由宏指令中的位字段直接选择。 此外，由控制存储器输出的选择位之一用于选择与特定分支目的地相关联的两位结果的两个可能输出代码之一。 后一个特征允许控制存储器中的两个条件分支点测试相同的条件，并且当测试条件是一个逻辑状态时选择相同的目的地，而当测试条件是相反的逻辑状态时，选择不同的目的地。