公开(公告)号：EP0681330A3

公开(公告)日：1997-05-28

申请号：EP95106318.9

申请日：1995-04-27

申请人： MOTOROLA, INC.

发明人： Romero, Guillermo L. ,  Martinez, Joe L.

IPC分类号： H01L25/07

CPC分类号： H01L23/473 ,  H01L25/0652 ,  H01L2924/0002 ,  H01L2924/00

摘要： An electronic module (10) for removing heat from a semiconductor die (41) and a method of making the electronic module (10). The electronic module (10) has a baseplate (11) mated with an isolation structure (23). The isolation structure (23) has three portions: a first portion is bonded to the top surface (12) of the baseplate (11), a second portion is bonded to the bottom surface (13) of the baseplate (11), and a third portion is bonded to a side (14) of the baseplate (11). A semiconductor die (41) is bonded to the first portion of the isolation structure (23) and another semiconductor die (41) is bonded to the second portion of the isolation structure (23). The baseplate (11) has a cavity (20) through which a fluid flows and transports heat away from each semiconductor die (41).

公开(公告)号：EP0773694A2

公开(公告)日：1997-05-14

申请号：EP97101016.0

申请日：1988-10-20

申请人： MOTOROLA, INC.

发明人： Lynk, Charles N. ,  Schorman, Eric R.

IPC分类号： H04Q7/28 ,  H04B7/26

CPC分类号： H04W72/044 ,  H04W4/10 ,  H04W4/12 ,  H04W28/14 ,  H04W72/04 ,  H04W72/0413 ,  H04W74/00 ,  H04W76/10 ,  H04W76/45 ,  H04W84/08

摘要： With regard to Figures 6 and 7 of the drawings, a method of call origination between a radio subscriber and a wireline party is shown that only assigns (211, 212) information resources of a trunked radio communication system at a time (208, 210) when the called party answers the call, whereby efficiency and capacity of the trunked system is improved.

摘要翻译： 关于附图的图6和图7，示出了无线电用户和有线方之间的呼叫发起的方法，其仅在时间（208,210）分配集群无线电通信系统的信息资源（211,212） 当被叫方应答呼叫时，提高了集群系统的效率和容量。

公开(公告)号：EP0769212A1

公开(公告)日：1997-04-23

申请号：EP95928667.0

申请日：1995-07-19

申请人： MOTOROLA, INC.

发明人： VENUGOPAL, Ganesh ,  REICHERT, Veronica R. ,  ZHANG, Jinshan

IPC分类号： H01M2 ,  H01M6 ,  H01M10

CPC分类号： H01M10/052 ,  H01M2/1653 ,  H01M6/16 ,  H01M10/0565 ,  H01M2300/0025 ,  Y02T10/7011

摘要： An electrolyte system (40) for use in connection with an electrochemical cell (10). The cell (10) includes a positive (20) and a negative (30) electrode and the electrolyte system (40) disposed therebetween. The electrolyte system includes a liquid electrolyte adapted to provide ion transport between the positive and negative electrodes and a segmented block copolymeric support structure for engaging the liquid electrolyte.

公开(公告)号：EP0768715A2

公开(公告)日：1997-04-16

申请号：EP96115902.7

申请日：1996-10-04

申请人： MOTOROLA INC.

发明人： Davies, Robert B. ,  Baker, Frank K. ,  Candelaria, Jon J. ,  Wild, Andreas A. ,  Zdebel, Peter J.

IPC分类号： H01L29/10 ,  H01L29/78 ,  H01L21/336

CPC分类号： H01L29/66583 ,  H01L29/1045 ,  H01L29/1083 ,  H01L29/665 ,  H01L29/66537 ,  H01L29/6656 ,  H01L29/66575 ,  H01L29/7838

摘要： A graded-channel semiconductor device (10) includes a substrate region (11) having a major surface (12). A source region (13) and a drain region (14) are formed in the substrate region (11) and are spaced apart to form a channel region (16). A doped region (18) is formed in the channel region (16) and is spaced apart from the source region (13), the drain region (14), and the major surface (12). The doped region (18) has the same conductivity type as the channel region (16), but has a higher dopant concentration. The device (10) exhibits an enhanced punch-through resistance and improved performance compared to prior art short channel structures.

摘要翻译： 分级沟道半导体器件（10）包括具有主表面（12）的衬底区域（11）。 源区域（13）和漏极区域（14）形成在衬底区域（11）中并且间隔开以形成沟道区域（16）。 掺杂区域（18）形成在沟道区域（16）中并且与源极区域（13），漏极区域（14）和主表面（12）间隔开。 掺杂区域（18）具有与沟道区域（16）相同的导电类型，但具有较高的掺杂剂浓度。 与现有技术的短沟道结构相比，器件（10）表现出增强的穿通电阻和改进的性能。

公开(公告)号：EP0767490A1

公开(公告)日：1997-04-09

申请号：EP96115214.7

申请日：1996-09-23

申请人： MOTOROLA, INC.

发明人： Thero, Christine ,  Norton, Patricia A.

IPC分类号： H01L21/467 ,  H01L21/465

CPC分类号： H01L21/0475 ,  Y10S438/931

摘要： A mask (12) is applied to a silicon carbide substrate (11) in order to etch the substrate (11). The material used for the mask (12) has a Mohs hardness factor greater than 4 in order to prevent sputtering material from the mask (12) onto the substrate (11). An oxygen and sulfur hexafluoride plasma is utilized to perform the etch.

摘要翻译： 将掩模（12）施加到碳化硅衬底（11）上以蚀刻衬底（11）。 用于掩模（12）的材料具有大于4的莫氏硬度因子，以防止将掩模（12）溅射到衬底（11）上。 利用氧和六氟化硫等离子体进行蚀刻。

公开(公告)号：EP0763851A2

公开(公告)日：1997-03-19

申请号：EP96113459.0

申请日：1996-08-22

申请人： MOTOROLA, INC.

发明人： Dow, Diann M. ,  Davies, Robert B. ,  Wild, Andreas A. ,  Ilderem, Vida

IPC分类号： H01L21/336 ,  H01L21/8234 ,  H01L29/78

CPC分类号： H01L29/66659 ,  H01L21/823412 ,  H01L21/823468 ,  H01L29/1045 ,  H01L29/7835

摘要： A method for forming a graded-channel field effect transistor includes providing a substrate (10) with an overlying gate electrode (14, 16). A spacer (23) is formed on only the drain side of the electrode. A graded-channel region (36) is formed aligned to the source side of the electrode while the spacer protects the drain side of the channel region. Source/drain regions (38) are formed, the spacer is removed, and then a drain extension region (40) is formed aligned to the drain side of the electrode.

公开(公告)号：EP0762096A1

公开(公告)日：1997-03-12

申请号：EP96113883.1

申请日：1996-08-30

申请人： MOTOROLA, INC.

发明人： Sooriakumar, K. ,  Monk, David J. ,  Chan, Wendy K. ,  Goldman, Kenneth G.

IPC分类号： G01L9/00 ,  G01L9/04 ,  G01L9/06

CPC分类号： G01L19/148 ,  G01L9/0055 ,  G01L19/0084 ,  G01L19/0627 ,  G01L19/143 ,  G01L19/147 ,  H01L24/45 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13062 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/01079 ,  H01L2924/00

摘要： A vertically integrated sensor structure (60) includes a base substrate (71) and a cap substrate (72) bonded to the base substrate (71). The base substrate (71) includes a transducer (78) for sensing an environmental condition. The cap substrate (72) includes electronic devices (92) formed on one surface to process output signals from the transducer (78). The sensor structure (60) provides an integrated structure that isolates sensitive components from harsh environments.

摘要翻译： 垂直集成的传感器结构（60）包括基底（71）和与基底（71）接合的帽基底（72）。 基底（71）包括用于感测环境条件的换能器（78）。 盖基板（72）包括形成在一个表面上以处理来自换能器（78）的输出信号的电子设备（92）。 传感器结构（60）提供了将敏感部件与恶劣环境隔离的集成结构。

公开(公告)号：EP0760545A1

公开(公告)日：1997-03-05

申请号：EP96113178.6

申请日：1996-08-16

申请人： MOTOROLA, INC.

发明人： Ramdani, Jamal ,  Lebby, Michael S. ,  Lee, Hsing-Chung

IPC分类号： H01S3/085 ,  H01S3/19

CPC分类号： B82Y20/00 ,  H01S5/183 ,  H01S5/3406 ,  H01S5/34326 ,  H01S5/3434

摘要： A short wavelength VCSEL including a mirror stack (10) positioned on a substrate (11), formed of a plurality of pairs of relatively high and low index of refraction layers a second mirror stack (15) formed of a plurality of pairs of relatively high and low index of refraction layers, an active region (12) sandwiched between the first stack (10) and the second stack (15), the active region (12) being formed of quantum well layers (20, 21, 22) of GaAsP having barrier layers (25, 26) of GaInP sandwiched therebetween, the quantum well (20, 21, 22) and barrier layers (25, 26) having substantially equal and opposite lattice mismatch.

摘要翻译： 一种短波长VCSEL，其包括位于基板（11）上的反射镜叠层（10），所述反射镜叠层由多对相对较高和较低的折射率折射率层组成，第二反射镜叠层（15）由多对相对高的 和低折射率层，夹在第一堆叠（10）和第二堆叠（15）之间的有源区（12），有源区（12）由GaAsP的量子阱层（20,21,22）形成 具有夹在其间的GaInP的阻挡层（25,26），所述量子阱（20,21,22）和阻挡层（25,26）具有基本相等且相反的晶格失配。

公开(公告)号：EP0760515A2

公开(公告)日：1997-03-05

申请号：EP96113642.1

申请日：1996-08-26

申请人： MOTOROLA, INC.

发明人： Tai, Jy-Der D.

IPC分类号： G11C11/22

CPC分类号： G11C11/22

摘要： A method for reading and restoring data in a FERAM (10) is provided. The FERAM (10) comprises a FET (11) and a ferroelectric capacitor (12). The FET (11) has a gate connected to a word line (14), a source coupled to a plate line (15) via the ferroelectric capacitor (12), and a drain connected to a bit line (16). The reading process begins by placing a predetermined amount of charge in a bit line capacitor (17), which in turn charges the ferroelectric capacitor (12) after the FET (11) is switched on, resulting in a voltage drop determined by data stored in the FERAM (10) at the bit line (16). A sense amplifier (18) adjusts the voltage at the bit line (16) accordingly to read data from the FERAM (10). Applying a voltage at the plate line (15) and switching the FET (11) off restore the data to the FERAM (10).

摘要翻译： 数据存储元件（10）具有FET开关（11）和具有极化保持力的铁电电容器（12）存储装置。 开关具有用于接收控制信号的栅极（14）和耦合到电容器（12）的用于接收恢复信号的第一导电电极。 连接第二电极用于发送数据。 可以将开关置于非导通状态，并且可以经由具有极化保持的电容器施加第一恢复信号。 充电电压可以通过位线电容器（17）施加到开关的第二电极。 可以通过响应于第二电极处的电压向第二电极施加数据值电压来将开关设置为导通状态，以从数据存储元件读取数据。 可以经由具有极化保持的电容器将第二恢复信号施加到第一电极，并且可以将开关置于非导通状态以恢复数据存储元件中的数据。

公开(公告)号：EP0756328A2

公开(公告)日：1997-01-29

申请号：EP96111565.6

申请日：1996-07-18

申请人： MOTOROLA, INC.

发明人： Parris, Patrice M. ,  See, Yee-Chaung

IPC分类号： H01L27/115

CPC分类号： H01L27/115

摘要： A non-volatile memory cell (10) is provided employing two transistors (11, 12) connected in series. A floating gate structure (13), formed with a single polysilicon deposition, is shared by each transistor (11, 12) to store the logic condition of the memory cell (10). To program and erase the memory cell (10), a voltage potential is placed on the floating gate (13) which modulates the transistors (11, 12) so only one is conducting during read operations. The gate capacitance of the transistors (11, 12) is used to direct the movement of electrons on or off the floating gate structure (13) to place or remove the stored voltage potential. The two transistor memory cell (10) couples one of two voltage potentials as the output voltage so no sense amp or buffer circuitry is required. The memory cell (10) can be constructed using traditional CMOS processing methods since no additional process steps or device elements are required.

摘要翻译： 提供采用两个串联连接的晶体管（11,12）的非易失性存储单元（10）。 由单个多晶硅沉积形成的浮栅结构（13）由每个晶体管（11,12）共享以存储存储单元（10）的逻辑状态。 为了编程和擦除存储单元（10），在调节晶体管（11,12）的浮动栅极（13）上放置电压电位，使得在读取操作期间只有一个导通。 晶体管（11,12）的栅极电容被用于引导电子移动浮动栅极结构（13）上或离开浮动栅极结构（13）以放置或移除所存储的电压电势。 两个晶体管存储单元（10）将两个电压电位之一作为输出电压，所以不需要读出放大器或缓冲电路。 存储单元（10）可以使用传统的CMOS处理方法构造，因为不需要额外的处理步骤或设备元件。