公开(公告)号：EP0776547B1

公开(公告)日：2002-05-08

申请号：EP96913694.4

申请日：1996-05-28

Applicant: Koninklijke Philips Electronics N.V.

Inventor： MOHINDRA, Rishi

IPC: H03D3/00 ,  H03H7/18

CPC classification number: H03D3/06 ,  H03D3/22

Abstract: Known is a digital radio system comprising a digital radio device for phase or frequency modulated digital signals with a substantial amplitude roll-off at the relevant operating range. A digital radio device is provided with a quadrature demodulator not having such an amplitude roll-off. This is obtained by a phase shifting network in a quadrature branch of the demodulator having a series arrangement of a resistor and a capacitor coupled to an inductor coupled to ground. A junction between the series arrangement and the inductor forms the output of the quadrature branch. Alternative embodiments are provided. The demodulator avoids asymmetric digital signal distortion which can have deteriorating effects, in particular to GFSK-signals or π/4-DQPSK signals, or the like, and further noise shift of data which is of particular importance in low [S/N]-systems such as paging systems.

公开(公告)号：EP0611099A1

公开(公告)日：1994-08-17

申请号：EP94300791.4

申请日：1994-02-02

Applicant: AT&T Corp.

Inventor： Arntz, Bernard James

IPC: H03H7/18

CPC classification number: H03H7/18

Abstract: A method and apparatus for imparting a positive phase slope (i.e., a negative group delay) to a narrowband signals is disclosed which adjuststhe phases of the various frequency components of a signal in a manner opposite to that of a delay line. The invention also permits the amount of phase slope to be adjusted, electronically, without the need for electro-mechanical apparatus or the interchange of cables. Furthermore, embodiments of the present invention are advantageous in that at the center of the operating band they maintain the phase of the delayed signal. These results are obtained in an illustrative embodiment of the present invention which divides the signal to be delayed into two signals which traverse different signal paths (715, 719) and are recombined in a signal combiner (729). The first signal path advantageously comprises a gain control block (717). The second signal path advantageously comprises a second gain control block (725) and a fixed line delay (719) which is not found in the first signal path. The amount of phase slope imparted to the signal can be adjusted by varying the gain (or attenuation) of the respective gain control blocks (717, 725).

Abstract translation: 该约会。 对输入信号的处理，其包括输入振幅和以每秒W0弧度的正弦分量，并且具有一个信号分配器E.G. 一混合耦合器，用于产生两个信号。 分频信号，在此基础上被施加到两个信号路径的输入信号，在所有已respectivement振幅。 两个分开的信号是输入信号的每一个模拟表示。 混频器接收来自respectivement信号路径的两个信号，并且在产生输出信号，其具有基于所述两个信号的和振幅。 在第二信号路径中的延迟元件使得接近pi.N / W0秒比第一信号路径，其中N是正奇整数更长的路径。 在第二信号路径中的衰减器降低所述第二信号w.r.t. 所述第一信号。 输出幅度近似等于输入幅度。

公开(公告)号：EP3110005B1

公开(公告)日：2021-11-24

申请号：EP16175810.7

申请日：2016-06-22

Inventor： KNIERIM, Daniel

IPC: H03H7/18 ,  H03H7/34 ,  H01P9/00 ,  H03K5/133 ,  H03K5/00

公开(公告)号：EP3419166B1

公开(公告)日：2020-01-01

申请号：EP16890509.9

申请日：2016-02-17

Applicant: Mitsubishi Electric Corporation

Inventor： KATO, Atsushi ,  TANIGUCHI, Eiji ,  MARUYAMA, Takaya ,  FUJIWARA, Takanobu ,  TSUTSUMI, Koji

IPC: H03H7/18 ,  H03H7/21

公开(公告)号：EP3419166A1

公开(公告)日：2018-12-26

申请号：EP16890509.9

申请日：2016-02-17

Applicant: Mitsubishi Electric Corporation

Inventor： KATO, Atsushi ,  TANIGUCHI, Eiji ,  MARUYAMA, Takaya ,  FUJIWARA, Takanobu ,  TSUTSUMI, Koji

IPC: H03H7/18

Abstract: Provided is a polyphase filter, which is capable of achieving amplitude matching and phase matching while achieving a low insertion loss with a single-stage configuration. A first variable resistor and a second variable resistor have resistance values that are equal to each other, and the resistance values are set so as to correct an amplitude error between orthogonal signals of outputs of a first output terminal to a fourth output terminal. A first variable capacitor, a second variable capacitor, a third variable capacitor, and a fourth variable capacitor have capacitance values that are equal to one another, and the capacitance values are set so as to correct a phase error between the orthogonal signals of the outputs of the first output terminal to the fourth output terminal.

公开(公告)号：EP2128996A4

公开(公告)日：2014-03-26

申请号：EP07850822

申请日：2007-12-18

Applicant: HITACHI METALS LTD

Inventor： KEMMOCHI SHIGERU ,  FUKAMACHI KEISUKE ,  HAGIWARA KAZUHIRO

IPC: H04B1/50 ,  H03H7/01 ,  H03H7/09 ,  H03H7/18 ,  H03H7/46 ,  H04B1/00 ,  H04B1/44

CPC classification number: H03H7/463 ,  H03H7/09 ,  H03H7/1708 ,  H03H7/175 ,  H03H7/1758 ,  H04B1/0057 ,  H04B1/44 ,  H04B1/50

Abstract: An inventive high frequency circuit includes a switch circuit (SPDT1), connected to an antenna terminal (Ant1), using a field-effect transistor for switching between a connection with first to third transmitting terminals (Tx1-1, Tx2-1, Tx3-1) and a connection with first to third receiving terminals (Rx1-1, Rx2-1, Rx3-1); a transmitting-side triplexer (Trip1) for branching a transmitting path connected to the switch circuit into transmitting paths of first to third frequency bands; and a receiving-side triplexer (Trip2) for branching a receiving path connected to the switch circuit into receiving paths of the first to third frequency bands. The switch circuit can be formed as an IC to downsize the circuit. For example, in constructing the high frequency circuit with a laminated module using a ceramic laminated substrate or the like, particularly when the number of triplexers occupying a large space is large, the switch circuit is formed as an IC and mounted on the laminated body, whereby the whole structure can be downsized.

公开(公告)号：EP1323237A4

公开(公告)日：2004-12-22

申请号：EP01969015

申请日：2001-09-10

Applicant: SKYWORKS SOLUTIONS INC

Inventor： MOLNAR ALYOSHA C

IPC: H03H7/18 ,  H03H7/21 ,  H04B1/58

CPC classification number: H03H7/21

Abstract: A system for an eight-phase 45° polyphase filter with amplitude matching, where a full eight-phase 45° split may be achieved by tying together the inputs of two offset four-phase 90° phase splitters. Amplitude matching may be achieved by obtaining those inputs from an additional single four-phase 90° phase splitter. The additional phase splitter can distribute power evenly among the inputs of the two offset phase splitters so as to cancel out the occurrence of any uneven power distribution.

公开(公告)号：EP1363398A1

公开(公告)日：2003-11-19

申请号：EP03701021.2

申请日：2003-01-07

Applicant: Mitsubishi Denki Kabushiki Kaisha

Inventor： MIYAGUCHI, Kenichi, Mitsubishi Denki Kabushiki K. ,  HIEDA, Morishige, Mitsubishi Denki Kabushiki K. ,  KASAHARA, Michiaki, Mitsubishi Denki Kabushiki K. ,  TAKAGI, Tadashi, Mitsubishi Denki Kabushiki K. ,  HATAMOTO, Mikio, Mitsubishi Denki Kabushiki K.

IPC: H03H11/20 ,  H03H7/18 ,  H03H7/20 ,  H01P1/185

CPC classification number: H03H7/18 ,  H01P1/185 ,  H03H7/20 ,  H03H11/20

Abstract: A phase shift circuit and a phase shifter are achieved which are small in size and wide in bandwidth. The phase shift circuit includes a capacitor, and a series circuit composed of a switching element which exhibits capacitivity when it is in an off-state and an inductor connected in series with this switching element, the series circuit being connected in parallel with the capacitor. The capacitor and one terminal of the series circuit are connected with a high frequency signal input/output terminal, and the other terminal thereof is connected with ground.

Abstract translation: 实现了移相电路和移相器的尺寸小，带宽大。 相移电路包括电容器，以及由开关元件构成的串联电路，该开关元件在处于断开状态时呈现电容性，并且与该开关元件串联连接的电感器，串联电路与电容器并联连接。 电容器和串联电路的一个端子与高频信号输入/输出端子连接，另一个端子与地连接。

公开(公告)号：EP1156585A2

公开(公告)日：2001-11-21

申请号：EP01108961.2

申请日：2001-04-10

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Matsumoto, Mitsuhiro, (A170) Intell. Prop. Dept. ,  Iida, Kazuhiro, (A170) Intell. Property Department ,  Tanaka, Koji, (A170) Intell. Property Department

IPC: H03H7/18

CPC classification number: H01P1/185 ,  H03H7/185

Abstract: A phase shifter (10) includes a comb-line (13) formed by first and second transmission lines (11 and 12) electromagnetically coupled with each other and a plurality of variable-capacitance diodes (D11, D12) connected to the first and second transmission lines (11 and 12) forming the comb-line (13). In the phase shifter (10), one end of the first transmission line (11) is connected to an input terminal (P i ), one end of the second transmission line (12) is connected to an output terminal (P o ), and the variable-capacitance diodes (D11, D12) are connected between the other ends of the first and second transmission lines (11 and 12) and the corresponding grounds.

Abstract translation: 移相器（10）包括通过彼此电磁耦合的第一和第二传输线（11和12）形成的梳状线（13）和连接到第一和第二端的多个可变电容二极管（D11，D12） 形成梳状线（13）的传输线（11和12）。 在移相器（10）中，第一传输线（11）的一端与输入端（P i）连接，第二传输线（12）的一端与输出端（P o）连接， 并且变容二极管（D11，D12）连接在第一和第二传输线（11和12）的另一端和相应的接地之间。

公开(公告)号：EP0659311A4

公开(公告)日：1997-10-29

申请号：EP94920058

申请日：1994-06-01

Applicant: UNIVERSAL DATA SYSTEMS INC

Inventor： NABORS DAVID H ,  NELSON DAVID PAUL

IPC: H03G11/04 ,  H03G5/02 ,  H03H11/04 ,  H04B3/04 ,  H04B3/08 ,  G11B5/035 ,  H03H5/00 ,  H03H7/18 ,  H03H9/00

CPC classification number: H04B3/08 ,  H03G5/025

Abstract: An equalizer (100) is suitable for removing the delay distortion from a switched digital signal received from a telephone channel where the delay distortion is caused by a bridge-tap connected to the telephone channel. The equalizer includes a feedback delay circuit (200) which is arranged to delay the output signal (150) by an amount of time based on the square of the predominant frequency of the output signal. The resulting delayed feedback signal (130) is then combined with the input signal, thereby compensating for the delay distortion. The equalizer also includes an amplifier (103) which may be adjusted to compensate to the attenuation distortion caused by the bridge tap.

Abstract translation: 均衡器（100）适用于消除从电话信道接收到的切换数字信号的延迟失真，其中延迟失真是由连接到电话信道的桥接抽头引起的。 均衡器包括反馈延迟电路（200），其被布置为基于输出信号的主频率的平方将输出信号（150）延迟一段时间。 所得到的延迟反馈信号（130）然后与输入信号组合，由此补偿延迟失真。 均衡器还包括放大器（103），其可以被调整以补偿由桥接抽头引起的衰减失真。