摘要:
Methods and systems for monolithic integration of photonics and electronics in CMOS processes are disclosed and may include fabricating photonic and electronic devices on a single CMOS wafer with different silicon layer thicknesses. The devices may be fabricated on a semiconductor-on-insulator (SOI) wafer utilizing a bulk CMOS process and/or on a SOI wafer utilizing a SOI CMOS process. The different thicknesses may be fabricated utilizing a double SOI process and/or a selective area growth process. Cladding layers may be fabricated utilizing one or more oxygen implants and/or utilizing CMOS trench oxide on the CMOS wafer. Silicon may be deposited on the CMOS trench oxide utilizing epitaxial lateral overgrowth. Cladding layers may be fabricated utilizing selective backside etching. Reflective surfaces may be fabricated by depositing metal on the selectively etched regions. Silicon dioxide or silicon germanium integrated in the CMOS wafer may be utilized as an etch stop layer.
摘要:
Methods for deposition of a Ge layer during a CMOS process on a monolithic device are disclosed. The insertion of the Ge layer enables the conversion of light to electrical signals easily. As a result of this method, standard metals can be attached directly to the Ge in completing an electrical circuit. Vias can also be used to connect to the Ge layer. In a first aspect of the invention, a method comprises the step of incorporating the deposition of Ge at multiple temperatures in a standard CMOS process. In a second aspect of the invention, a method comprises the step of incorporating the deposition of poly-Ge growth in a standard CMOS process.
摘要:
Methods and systems for grating couplers (117A-117H) incorporating perturbed waveguides are disclosed and may include in a semiconductor photonics die (130), communicating optical signals into and/or out of the die utilizing a grating coupler (117A-117H) on the die, where the grating coupler comprises perturbed waveguides. The perturbed waveguides may comprise a variable width along their length. The grating coupler may comprise a single polarization grating coupler comprising perturbed waveguides and a non-perturbed grating. The grating coupler may comprise a polarization splitting grating coupler (PSGC) (403)that includes two sets of perturbed waveguides at a non-zero angle, or a plurality of non-linear rows of discrete shapes. The PSGC may comprise discrete scatterers (805) at an intersection of the sets of perturbed waveguides. The grating couplers may be etched in a silicon layer on the semiconductor photonics die or deposited on the semiconductor photonics die. The grating coupler may comprise individual scatterers (805) between the perturbed waveguides.
摘要:
Methods and systems for a distributed optical transmitter with local domain splitting is disclosed and may include, in an optical modulator integrated in a silicon photonics chip: receiving electrical signals, communicating the electrical signals to domain splitters along a length of waveguides of the optical modulator utilizing one or more delay lines, generating electrical signals in voltage domains utilizing the domain splitters, modulating received optical signals in the waveguides of the optical modulator by driving diodes with the electrical signals generated in the voltage domains, and generating a modulated output signal through interference of the modulated optical signal in the waveguides of the optical modulator. The delay lines may comprise one delay element per domain splitter, or may comprise a delay element per domain splitter for a first subset of the domain splitters and more than one delay element per domain splitter for a second subset of the domain splitters.