摘要:
A testing system connects a subscriber line (2) to be tested by way of a semiconductor switch (13) of a type driven by a constant current to a test equipment (12) to test a subscriber line and a terminal equipment. The test system includes a compensation circuit (7) having means (30 to 33) for measuring a constant current component contained in a current flowing through the semiconductor switch into a test line, and means (34) for drawing a constant current component to drive the switch through the test line on the basis of the measuring result to supply the current component obtained by subtracting the constant current component from the current flowing through the test line to the testing equipment.
摘要:
current supply circuit comprises a DC power feed circuit (25) exhibiting a constant current characteristic for a power source (1) and a constant resistance characteristic for a load, a first detecting circuit for detecting a load current or a load voltage, a DC-DC converter circuit (22) inserted between the power source and the DC power feed circuit (25), a second detecting circuit for detecting an output voltage from the DC-DC converter circuit (22); and an operation circuit (24) coupled at the input with the output of the first detecting circuit and the output of the second detecting circuit for controlling the DC-DC converter circuit (22) by the output thereof. The DC-DC converter circuit (22) is so controlled as to produce a voltage representative of the sum of a voltage drop across the load and a fixed voltage necessary for the operation of the DC power feed circuit (25).
摘要:
A lateral transistor having a high breakdown voltage and operable with an improved current amplification factor and an improved cut-off frequency comprises in a semiconductor substrate (14) of one conductivity type, a base layer (16) of the one conductivity type and an emitter layer (11) of the other conductivity type formed in the base layer. A first collector layer (12) of the other conductivity type is formed in the one principal surface of the substrate apart from the base layer and a second collector layer (13) of the same conductivity type having an impurity concentration lower than that of the first collector layer is formed between the first collector layer and the base layer in contact with the latter layers. Emitter, base and collector electrodes (17,18,19) make ohmic contact with the emitter, base and first collector layers respectively. The emitter electrode extends on a passivation film (15) covering the one principal surface of the substrate to terminate at a point on the second collector layer.
摘要:
A semiconductor integrated circuit device of an 1 2 L type is disclosed. The bit lines (Bo, B o, B 1 , B 1 ) are supplied with a clamp circuit (CL,) which supplies non-selected memory cells with sink currents. In order to ensure that the potentials of the bit lines are clamped at a level between the upper and lower limits dictated by the requirements for fast writing and the retention of information, the clamp circuit incorporates one or more dummy cells (DC,) which are similar to the memory cells (CELL). Variations in their manufacture will cause the characteristics of the dummy cells (and hence the said limits) to vary in the same way as those of the memory cells. Therefore the clamp voltage level can be set close to one or other of the said limits in the assurance that the level will always be within the limits.
摘要:
The passive prefilter (61) is comprised only of a plurality of additional switched capacitors (62) which are added to a switched capacitor (63) common to a switched-capacitor filter (32). The switched capacitor (63) common to said switched-capacitor filter is driven by clock pulses at the sampling frequency of the filter. The prefilter samples and holds the input signal (VSin) at a rate equal to an even harmonic of the sampling frequency, combines all signals held over a sampling period, and provides the filter (32) with this summed signal (Vout). The prefilter reduces substantially any calias signals», that is input signals (VSin) of a frequency close to the sampling frequency or to an harmonic of the sampling frequency.