Subscriber line testing system
    46.
    发明公开
    Subscriber line testing system 失效
    用户线路测试系统。

    公开(公告)号:EP0061189A1

    公开(公告)日:1982-09-29

    申请号:EP82102358.7

    申请日:1982-03-22

    IPC分类号: H04M3/30

    CPC分类号: H04M3/30

    摘要: A testing system connects a subscriber line (2) to be tested by way of a semiconductor switch (13) of a type driven by a constant current to a test equipment (12) to test a subscriber line and a terminal equipment. The test system includes a compensation circuit (7) having means (30 to 33) for measuring a constant current component contained in a current flowing through the semiconductor switch into a test line, and means (34) for drawing a constant current component to drive the switch through the test line on the basis of the measuring result to supply the current component obtained by subtracting the constant current component from the current flowing through the test line to the testing equipment.

    Current supply circuit
    47.
    发明公开
    Current supply circuit 失效
    电源电路。

    公开(公告)号:EP0057009A1

    公开(公告)日:1982-08-04

    申请号:EP82100516.2

    申请日:1982-01-26

    IPC分类号: H04M19/08 H02M3/155 H02J1/04

    CPC分类号: H04M19/008

    摘要: current supply circuit comprises a DC power feed circuit (25) exhibiting a constant current characteristic for a power source (1) and a constant resistance characteristic for a load, a first detecting circuit for detecting a load current or a load voltage, a DC-DC converter circuit (22) inserted between the power source and the DC power feed circuit (25), a second detecting circuit for detecting an output voltage from the DC-DC converter circuit (22); and an operation circuit (24) coupled at the input with the output of the first detecting circuit and the output of the second detecting circuit for controlling the DC-DC converter circuit (22) by the output thereof. The DC-DC converter circuit (22) is so controlled as to produce a voltage representative of the sum of a voltage drop across the load and a fixed voltage necessary for the operation of the DC power feed circuit (25).

    Semiconductor device
    48.
    发明公开
    Semiconductor device 失效
    半导体器件

    公开(公告)号:EP0036319A1

    公开(公告)日:1981-09-23

    申请号:EP81301084.0

    申请日:1981-03-16

    IPC分类号: H01L29/72

    摘要: A lateral transistor having a high breakdown voltage and operable with an improved current amplification factor and an improved cut-off frequency comprises in a semiconductor substrate (14) of one conductivity type, a base layer (16) of the one conductivity type and an emitter layer (11) of the other conductivity type formed in the base layer. A first collector layer (12) of the other conductivity type is formed in the one principal surface of the substrate apart from the base layer and a second collector layer (13) of the same conductivity type having an impurity concentration lower than that of the first collector layer is formed between the first collector layer and the base layer in contact with the latter layers. Emitter, base and collector electrodes (17,18,19) make ohmic contact with the emitter, base and first collector layers respectively. The emitter electrode extends on a passivation film (15) covering the one principal surface of the substrate to terminate at a point on the second collector layer.

    摘要翻译: 具有高击穿电压并可用改进的电流放大因子和改善的截止频率操作的横向晶体管包括在一种导电类型的半导体衬底(14)中的一种导电类型的基极层(16)和发射极 在基层中形成的另一种导电类型的层(11)。 另一种导电类型的第一集电极层(12)形成在基底的一个主表面中,除了基底层和具有相同导电类型的第二集电极层(13),其杂质浓度低于第一集电极层 集电极层形成在第一集电极层和与后一层接触的基极层之间。 发射极,基极和集电极(17,18,19)分别与发射极,基极和第一集电极层进行欧姆接触。 发射极电极在覆盖基板的一个主表面的钝化膜(15)上延伸,以终止于第二集电极层上的一点。

    Semiconductor integrated circuit memory device with integrated injection logic
    49.
    发明公开
    Semiconductor integrated circuit memory device with integrated injection logic 失效
    集成半导体存储器电路具有集成注入逻辑。

    公开(公告)号:EP0028157A1

    公开(公告)日:1981-05-06

    申请号:EP80303830.6

    申请日:1980-10-28

    IPC分类号: H01L27/02 G11C11/40

    摘要: A semiconductor integrated circuit device of an 1 2 L type is disclosed. The bit lines (Bo, B o, B 1 , B 1 ) are supplied with a clamp circuit (CL,) which supplies non-selected memory cells with sink currents. In order to ensure that the potentials of the bit lines are clamped at a level between the upper and lower limits dictated by the requirements for fast writing and the retention of information, the clamp circuit incorporates one or more dummy cells (DC,) which are similar to the memory cells (CELL). Variations in their manufacture will cause the characteristics of the dummy cells (and hence the said limits) to vary in the same way as those of the memory cells. Therefore the clamp voltage level can be set close to one or other of the said limits in the assurance that the level will always be within the limits.

    Switched-capacitor filter
    50.
    发明公开
    Switched-capacitor filter 失效
    过滤器geschalteten Kondensatoren。

    公开(公告)号:EP0020131A1

    公开(公告)日:1980-12-10

    申请号:EP80301758.1

    申请日:1980-05-28

    IPC分类号: H03H19/00

    CPC分类号: H03H19/004

    摘要: The passive prefilter (61) is comprised only of a plurality of additional switched capacitors (62) which are added to a switched capacitor (63) common to a switched-capacitor filter (32). The switched capacitor (63) common to said switched-capacitor filter is driven by clock pulses at the sampling frequency of the filter. The prefilter samples and holds the input signal (VSin) at a rate equal to an even harmonic of the sampling frequency, combines all signals held over a sampling period, and provides the filter (32) with this summed signal (Vout). The prefilter reduces substantially any calias signals», that is input signals (VSin) of a frequency close to the sampling frequency or to an harmonic of the sampling frequency.

    摘要翻译: 无源前置滤波器(61)仅由添加到开关电容滤波器(32)公共的开关电容器(63)的多个附加开关电容器(62)组成。 所述开关电容滤波器共用的开关电容器(63)由滤波器的采样频率的时钟脉冲驱动。 预滤波器以等于采样频率的偶次谐波的速率采样并保持输入信号(VSin),合并在采样周期内保持的所有信号,并向滤波器(32)提供该求和信号(Vout)。 预滤器基本上减少了任何“别名信号”,即接近采样频率的频率或采样频率的谐波的输入信号(VSin)。