公开(公告)号：EP0743773B1

公开(公告)日：2007-01-24

申请号：EP96107782.3

申请日：1996-05-15

申请人： Mindspeed Technologies, Inc.

发明人： Shlomot, Eyal (NMI) ,  Simpson, Michael J. ,  Ye, Qiang (NMI)

IPC分类号： H04L7/00 ,  H04J3/06

CPC分类号： H04L12/6418 ,  H04J3/0632 ,  H04L2012/6481 ,  H04L2012/6489

公开(公告)号：EP1741133A1

公开(公告)日：2007-01-10

申请号：EP05743044.9

申请日：2005-04-22

申请人： Infineon Technologies AG

发明人： DAHL, Claus ,  TILKE, Armin

IPC分类号： H01L21/8249

CPC分类号： H01L21/8249 ,  H01L29/66242

摘要： The invention relates to a method for producing a planar spacer, an associated bipolar transistor and an associated biCMOS circuit arrangement, wherein the first and second spacer layers (3, 4) are formed on a substrate (1) after a sacrifice mask (2) is formed and first and second spacer layers (3, 4) are embodied. In order to produce auxiliary spacers (4S) on the second spacer layer (4), a first anisotropic etching process is carried out. Afterwards, a second anisotropic etching process is carried out by means of the auxiliary spacers (4S) for producing a planar spacer (PS), thereby making it possible to freely select the height of the thus produced planar spacer (PS), wherein the planarity thereof very much simplifies the continuation of the process. The inventive method makes it possible to produce components exhibiting improved electric properties.

公开(公告)号：EP1739737A1

公开(公告)日：2007-01-03

申请号：EP06115226.0

申请日：2006-06-09

申请人： Infineon Technologies AG

发明人： Gutmann, Alois ,  Naujok, Markus ,  Pallachalil, Muhammed Shafi Kurikka Valappil ,  Wendt, Hermann

IPC分类号： H01L21/768 ,  H01L23/522

CPC分类号： H01L23/5222 ,  H01L21/7682 ,  H01L2924/0002 ,  H01L2924/00

摘要： Methods of forming air gaps between interconnects of integrated circuits and structures thereof are disclosed. A first insulating material is deposited over a workpiece, and a second insulating material having a sacrificial portion is deposited over the first insulating material. Conductive lines are formed in the first and second insulating layers. The second insulating material is treated to remove the sacrificial portion, and at least a portion of the first insulating material is removed, forming air gaps between the conductive lines. The second insulating material is impermeable as deposited and permeable after treating it to remove the sacrificial portion. A first region of the workpiece may be masked during the treatment, so that the second insulating material becomes permeable in a second region of the workpiece yet remains impermeable in the first region, thus allowing the formation of the air gaps in the second region, but not the first region.

摘要翻译： 公开了在集成电路的互连和其结构之间形成气隙的方法。 第一绝缘材料沉积在工件上，并且具有牺牲部分的第二绝缘材料沉积在第一绝缘材料上。 导电线形成在第一和第二绝缘层中。 处理第二绝缘材料以去除牺牲部分，并且去除第一绝缘材料的至少一部分，在导线之间形成气隙。 第二绝缘材料在处理它以除去牺牲部分之后是不可渗透的并且是可渗透的。 工件的第一区域可以在处理期间被掩蔽，使得第二绝缘材料在工件的第二区域变得可渗透，但在第一区域中仍然不可渗透，从而允许在第二区域中形成气隙，但是 不是第一个地区。

公开(公告)号：EP1649501B1

公开(公告)日：2007-01-03

申请号：EP03817953.7

申请日：2003-07-30

申请人： Infineon Technologies AG

发明人： LIM, Chan ,  LEE, Kilho

IPC分类号： H01L21/28 ,  H01L29/51

CPC分类号： H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L29/513 ,  H01L29/518 ,  H01L2924/0002 ,  Y10S257/914 ,  H01L2924/00

摘要： A high-k dielectric film, a method of forming the same and related semiconductor device are provided, wherein a bottom layer (B) of metal -silicon-oxynitride having a first nitrogen content (zB) and a first silicon content (xB), and a top layer (T) of metal -silicon-oxynitride having a second nitrogen content (zT) and a second silicon content (xT) are formed in such a way that the second nitrogen content (zT) is higher than the first nitrogen content (zB) and the second silicon content (xT) is higher than the first silicon content (xB).Thus, a dielectric film (2) with excellent leakage characteristics and a very high dielectric constant is formed.

公开(公告)号：EP1094607B1

公开(公告)日：2006-12-06

申请号：EP99120073.4

申请日：1999-10-20

申请人： Infineon Technologies AG

发明人： Ludwig, Christoph, Dr. ,  Kutter, Christoph, Dr. ,  Wolf, Konrad, Dr. ,  Heitzsch, Olaf ,  Huckels, Kai ,  Rennekamp, Reinhold ,  Röhrich, Mayk ,  Stein von Kamienski, Elard, Dr. ,  Wawer, Peter, Dr. ,  Springmann, Oliver

IPC分类号： H03K19/173 ,  G11C16/04 ,  H01L29/788

CPC分类号： H01L29/7883 ,  G11C16/0441 ,  H01L29/0692

公开(公告)号：EP1709681A1

公开(公告)日：2006-10-11

申请号：EP04805058.7

申请日：2004-12-30

申请人： Infineon Technologies AG

发明人： NIRSCHL, Thomas ,  OLBRICH, Alexander ,  OSTERMAYR, Martin

IPC分类号： H01L21/8242

CPC分类号： H01L27/10888 ,  H01L27/108 ,  H01L27/1085 ,  H01L27/10855 ,  H01L27/10885 ,  H01L28/90

摘要： The invention relates to a semiconductor memory cell and to a method for producing the same, whereby a storage capacitor is linked with a select transistor (AT). The storage capacitor is configured as a contact hole capacitor (KK) in at least one contact hole for a source or drain region (S, D). The inventive semiconductor memory cell can be produced at especially reduced costs and allows for a high scale of integration.

公开(公告)号：EP1708292A2

公开(公告)日：2006-10-04

申请号：EP06110958.3

申请日：2006-03-10

申请人： Infineon Technologies AG

发明人： Seidl, Harald

IPC分类号： H01L45/00

CPC分类号： H01L45/06 ,  G11C2213/52 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/1273 ,  H01L45/144 ,  H01L45/1683

摘要： Die vorliegende Erfindung betrifft eine Anschlusselektrode (4) für Phasen-Wechsel-Materialien (5), ein zugehöriges Phasen-Wechsel-Speicherelement sowie ein zugehöriges Herstellungsverfahren, wobei in einem Elektrodenmaterial (E) eine Vielzahl von voneinander getrennten Isolationsgebieten (I) zumindest an der Anschlussoberfläche ausgebildet sind. Auf diese Weise verringert sich eine Gesamt-Kontaktfläche wodurch auch bei hohen Integrationsdichten eine erforderliche joulesche Erwärmung und somit Programmierung bei sehr kleinen Strömen realisiert werden kann.

摘要翻译： 所述电极（4）具有在导电的电极材料（E）具有用于相变材料的连接面。 许多隔离区（I）的在电极材料内的连接面被设计用于降低总接触面积。 的电极材料被相干到在相对的主表面上的隔离区，其从连接表面之间延伸的设计。 因此独立claimsoft包括用于制造相变存储器单元的方法。

公开(公告)号：EP1697998A1

公开(公告)日：2006-09-06

申请号：EP04820848.2

申请日：2004-11-26

申请人： Infineon Technologies AG

发明人： SCHRÜFER, Klaus

IPC分类号： H01L29/786

CPC分类号： H01L29/802 ,  H01L29/78684 ,  H01L29/78687 ,  Y10S438/933 ,  Y10S438/936

摘要： The invention relates to a field effect transistor with a heterostructure, comprising a support material, which has a stress-relieved monocrystalline semiconductor layer (3) consisting of a first semiconductor material (Si), a strained monocrystalline semiconductor layer (4), which has a semiconductor alloy (GexSi1-x), a fraction x of a second semiconductor material being freely selectable. In addition, a gate isolation layer (5) and a gate layer (6) are configured on the strained semiconductor layer (4). To define an undoped channel region (K), drain and source regions (D, S) are configured on either side of the gate layer at least in the strained semiconductor layer (4). The free selectability of the Ge fraction x allows any threshold voltage to be selected, thus permitting the production of modern logic semiconductor components.

公开(公告)号：EP1201069B1

公开(公告)日：2006-08-30

申请号：EP00947479.2

申请日：2000-07-18

申请人： Mindspeed Technologies, Inc.

发明人： OLAFSSON, Sverrir ,  CHU, Keith ,  BEADLE, Burk

IPC分类号： H04L29/06 ,  H04M11/06

CPC分类号： H04M11/06 ,  H04L5/1438 ,  H04L29/06 ,  H04L69/24

摘要： A quick startup procedure for a modem system utilizes known characteristics of a previously established communication channel to reduce the initialization period associated with subsequent connections over the same channel. In response to the establishment of a call, the modem devices determine whether the quick connect protocol is supported. If so, then the called modem transmits a modified answer tone to the calling modem. The calling modem analyzes the signal received in response to the modified answer tone to determine whether characteristics of the current channel are similar to stored characteristics associated with a previous connection over the same channel. If a channel "match" is found, then the modem devices carry out a quick initialization routine that eliminates, abbreviates, or modifies a number of procedures or protocols that are carried out in conventional modem startup processes. The general quick startup techniques may also be applied in the context of a quick reconnect procedure that can be performed in response to a temporary pausing or disconnecting of the data modem mode.

公开(公告)号：EP1687846A1

公开(公告)日：2006-08-09

申请号：EP04819243.9

申请日：2004-11-17

申请人： Infineon Technologies AG

发明人： HELNEDER, Johann ,  TORWESTEN, Holger

IPC分类号： H01L21/60 ,  H01L21/288

CPC分类号： H01L24/11 ,  H01L21/2885 ,  H01L24/13 ,  H01L2224/0347 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/03914 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/05572 ,  H01L2224/05655 ,  H01L2224/1147 ,  H01L2224/11472 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2924/0001 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01052 ,  H01L2924/01058 ,  H01L2924/01068 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/19043 ,  H01L2924/00014 ,  H01L2924/00

摘要： The invention relates inter alia to a method for galvanising consisting, for example in structuring a copper layer (24) by means of a resist (26). A barrier layer (22) placed under said copper layer (24) is used for supplying a galvanisation current to the areas without the copper layer. The inventive method makes it possible to produce high quality soldering bumps.

摘要翻译： 提供一种电镀方法，其中使用抗蚀剂对铜层进行图案化。 阻挡层位于铜层的下方，用于在没有铜层的区域中提供电镀电流。 该方法可以生产高质量的焊锡凸块。