摘要:
Integrated circuits and their production are described. A method for producing very closely juxtaposed electrodes, such as those in charge-transfer shift registers, is provided, wherein a first film of polysilicon (14) is deposited and localized oxidation is performed over a narrow strip to divide the film into two electrodes (15 and 17), whereafter the oxidized area of the film between the two electrodes is completely deoxidized to form a hollowed space in which a third electrode (38) may be placed. Said third electrode, which is also made of polysilicon, is deposited once a thin insulating film has been formed on the sides of electrodes (15) and (17). Since the hollowed space between the first two electrodes is narrow, a raised polysilicon portion is obtained. Thus, when the silicon of the deposited film is etched, electrodes remain only on the areas which previously were raised. A third electrode which is very close to the first two is thereby formed and has no coating other than on the sides of the first two electrodes.
摘要:
The circuit comprises two identical amplifiers (A1, A2), the first being the basic amplification cell of the circuit (input Ie, output Is), and the second recieving a reference signal (Iref). The output of the second amplifier, which is the product of the input (Iref) and the gain (G), is an input of an amplifier gain (G) control loop. This loop receives a reference voltage (Vc) to set the gain (G) as an exponential function of Vc. A high gain differential amplifier (AD) is the main component in this loop. The voltage differential between its inputs tends to be maintained at zero by the control loop. According to the invention, a logarithmic transfer function (LTF) component is placed in the loop between the output of the second amplifier (A2) and the input of the high gain differential amplifier (AD).
摘要:
L'invention concerne un étage d'adaptation ou de réjection de fréquences en sortie d'un circuit électronique travaillant à au moins trois fréquences. Ce circuit comprend normalement des réseaux d'adaptation et de réjection (C₁ L₁, C₂ L₂), qui sont calculés pour correspondre, chacun, à une fréquence donnée (F1, F3). Selon l'invention, au moins deux réseaux (C₁ L₁, C₂ L₂) sont combinés pour que leur combinaison corresponde à une troisième fréquence (F2). Application aux circuits hyperfréquences.
摘要:
L'invention décrit un système à au moins deux transistors complémentaires, à canaux n et p, mais comportant une hétérostructure entre matériaux III-V. Afin d'équilibrer les tensions de seuils dans les deux canaux n (2 DEG) et p (2GHG), au moins deux plans de dopage p (19) et n (20) sont inclus dans deux couches de l'hérostruc- ture, à des niveaux compris entre les canaux (2 DEG, 2 DHG) et les électrodes de grilles (7,8). Le plan de dopage n (20) est ensuite supprimé par gravure localisée à l'aplomb du transistor à canal p. Application à la logique rapide.