TEOS based plasma enhanced chemical vapor deposition process for deposition of silicon dioxide films.
    2.
    发明公开
    TEOS based plasma enhanced chemical vapor deposition process for deposition of silicon dioxide films. 失效
    等离子体辅助为二氧化硅的制备TEOS基础的CVD法。

    公开(公告)号:EP0272140A2

    公开(公告)日:1988-06-22

    申请号:EP87311193.4

    申请日:1987-12-18

    摘要: A high pressure, high throughput, single wafer, semiconductor processing reactor (10) is disclosed which is capable of thermal CVD, plasma-enhanced CVD, plasma-assisted etchback, plasma self-cleaning, and deposition topography modification by sputtering, either separately or as part of in-situ multiple step processing. The reactor includes cooperating arrays of interdigitated susceptor (16) and wafer fingers (20) which collectively remove the wafer (15) from a robot transfer blade (24) and position the wafer with variable, controlled, close parallel spacing between the wafer and the chamber gas inlet manifold (26) then return the wafer to the blade. A combined RF/gas feed-through device (36) protects against process gas leaks and applies RF energy to the gas inlet manifold without internal breakdown or deposition of the gas. The gas inlet manifold (26) is adapted for providing uniform gas flow over the wafer. Temperature-controlled internal and external manifold surfaces suppress condensation, premature reactions and decomposition and deposition on the external surfaces. The reactor also incorporates a uniform radial pumping gas system which enables uniform reactant gas flow across the wafer and directs purge gas flow downwardly and upwardly toward the periphery of the wafer for sweeping exhaust fases radially away from the wafer to prevent deposition outside the wafer and keep the chamber clean. The reactor provides uniform processing over a wide range of pressure including very high pressures. A low temperature CVD process for forming a highly conformal layer of silicon dioxide is also disclosed. The process uses very high chamber pressure and low temperature, and TEOS and ozone reactants. The low temperature CVD silicon dioxide deposition step is particularly useful for planarizing underlying stepped dielectric layers, either alone on in conjunction with a subsequent isotropic etch. A preferred in-situ multiple-step process for forming a planarized silicon dioxide layer uses (1) high rate silicon dioxide deposition at a low temperature and high pressure followed by (2) the deposition of the conformal silicon dioxide layer also at high pressure and low temperature, followed by (3) a high rate isotropic etch, preferably at low temperature and high pressure in the same reactor used for the two oxide deposition steps. Various combinations of the steps are disclosed for different applications, as is a preferred reactor self-cleaning step.

    摘要翻译: 的高压,高吞吐量,单晶片,半导体处理反应器(10)是圆盘游离缺失所有其能够热CVD,等离子体增强CVD,等离子体辅助回蚀,等离子体自洁,和沉积地形修改的通过溅射,或者单独地或者 如原位多步骤处理的一部分。 该反应器包括叉指式基座(16)和晶片的手指(20),其共同地除去来自机器人的转印刮板(24)的晶片(15)和与所述晶片和之间可变,对照,靠近的平行间隔的晶片位置的配合阵列 室气体入口歧管(26),然后将晶片返回到刀片。 组合的RF /气体馈通装置(36)可防止工艺气体泄漏和施加RF能量至气体入口歧管没有内部故障或气体的沉积。 气体入口歧管(26)被用于angepasst在晶片提供均匀的气流。 温度控制的内部和外部的歧管表面抑制外部表面上的冷凝,过早反应和分解和沉积。 因此,反应器集成了一个均匀的径向泵送气体系统,其跨所述晶片和ausrichtet净化气流向下和向上朝向晶片的周缘使扫排气fases从晶片径向远离,以防止沉积在晶片外,并保持均匀的反应气体流 在室清洗。 将反应器在宽范围的压力包括非常高的压力提供均匀的处理。 用于形成二氧化硅的高度保形层的低温CVD方法因此游离缺失盘。 该方法使用非常高的腔室压力和低温,和TEOS和臭氧的反应物。 低温CVD二氧化硅沉积步骤是用于平坦化下层台阶的介电层是特别有用的,无论是单独一个结合随后的各向同性蚀刻。 用于形成平坦化二氧化硅层的用途在低温和高压其次(2)保形二氧化硅层的沉积,从而在高压和(1)高速率的二氧化硅沉积的优选的原位多步骤的过程 低温,通过(3)的高率各向同性蚀刻其次,优选在低温和高压在用于两个氧化物沉积步骤相同的反应器中。 的步骤的各种组合是游离缺失盘针对不同的应用,如一个优选的反应器的自清洁步骤。

    APPARATUSES FOR ATOMIC LAYER DEPOSITION
    3.
    发明公开
    APPARATUSES FOR ATOMIC LAYER DEPOSITION 审中-公开
    VORRICHTUNGEN ZUR ATOMSCHICHTABLAGERUNG

    公开(公告)号:EP2913842A2

    公开(公告)日:2015-09-02

    申请号:EP15164096.8

    申请日:2009-07-02

    摘要: Embodiments of the invention provide apparatuses for atomic layer deposition (ALD), such as plasma-enhanced ALD (PE-ALD). In one embodiment, an inlet manifold assembly is provided which includes an annular channel encompassing a centralized channel, wherein the centralized channel extends through the inlet manifold assembly and injection holes extending from the annular channel, through a sidewall of the centralized channel, and to the centralized channel. The injection holes have a first plurality of injection holes extending towards or substantially towards a central axis of the centralized channel and the injection holes have a second plurality of injection holes extending tangential or substantially tangential towards the sidewall of the centralized channel.

    摘要翻译: 本发明的实施例提供了诸如等离子体增强型ALD(PE-ALD)的原子层沉积(ALD)装置。 在一个实施例中,提供入口歧管组件,其包括围绕集中通道的环形通道,其中集中通道延伸穿过入口歧管组件和从环形通道延伸通过集中通道的侧壁的注入孔, 集中渠道 喷射孔具有朝向或基本朝向集中通道的中心轴线延伸的第一多个喷射孔,并且喷射孔具有朝着集中通道的侧壁切向或基本切向延伸的第二多个喷射孔。

    One-piece dual gas faceplate for a showerhead in a semiconductor wafer processing system
    5.
    发明公开
    One-piece dual gas faceplate for a showerhead in a semiconductor wafer processing system 审中-公开
    一体式双气体前面板中用于半导体晶片的处理系统的分配头

    公开(公告)号:EP1134789A3

    公开(公告)日:2007-08-29

    申请号:EP01105470.7

    申请日:2001-03-14

    IPC分类号: H01L21/00 C23C16/44

    摘要: A one-piece gas distribution faceplate (1502) for a showerhead. The one-piece gas distribution faceplate (1502) includes a first surface (1504), a second surface (1506), and a third surface. The one-piece gas distribution faceplate comprises a plurality of first gas holes (1510) extending through the one-piece gas distribution faceplate between the first surface (1504) and the second surface (1506). The one-piece gas distribution faceplate (1502) has an internal gas distribution cavity (1509) defined by a plurality of interconnecting channels (1512B). A plurality of second gas holes (1520) extend through the one-piece gas distribution faceplate between the first surface (1504) into a plurality of the interconnecting channels (1512B). The interconnecting channels are fluidly coupled to a plenum (1606) that is in turn connected to at least one gas conduit (1630). The gas conduit extends to the third surface.

    One-piece dual gas faceplate for a showerhead in a semiconductor wafer processing system
    7.
    发明公开
    One-piece dual gas faceplate for a showerhead in a semiconductor wafer processing system 审中-公开
    一体式双气体前面板中用于半导体晶片的处理系统的分配头

    公开(公告)号:EP1134789A2

    公开(公告)日:2001-09-19

    申请号:EP01105470.7

    申请日:2001-03-14

    IPC分类号: H01L21/00

    摘要: A one-piece gas distribution faceplate (1502) for a showerhead. The one-piece gas distribution faceplate (1502) includes a first surface (1504), a second surface (1506), and a third surface. The one-piece gas distribution faceplate comprises a plurality of first gas holes (1510) extending through the one-piece gas distribution faceplate between the first surface (1504) and the second surface (1506). The one-piece gas distribution faceplate (1502) has an internal gas distribution cavity (1509) defined by a plurality of interconnecting channels (1512B). A plurality of second gas holes (1520) extend through the one-piece gas distribution faceplate between the first surface (1504) into a plurality of the interconnecting channels (1512B). The interconnecting channels are fluidly coupled to a plenum (1606) that is in turn connected to at least one gas conduit (1630). The gas conduit extends to the third surface.

    摘要翻译: 单件式气体分配面板(1502)为一个喷头。 单件式气体分配面板(1502)包括第一表面(1504),第二表面(1506),和第三表面。 单件式气体分配面板包括第一气体的孔(1510)通过所述第一表面(1504)和第二表面(1506)之间的一件式气体分配面板扩展的复数。 单件式气体分配面板(1502)必须通过互连通道(1512B)的多个限定的内部气体分配腔(1509)。 的第二气体的孔(1520)多个穿过所述第一表面(1504)之间的一件式气体分配面板延伸进入互连通道(1512B)的复数。 互连通道被流体连接到充气室(1606)做了又连接到至少一个气体导管(1630)。 所述气体管道延伸至所述第三表面上。

    TEOS based plasma enhanced chemical vapor deposition process for deposition of silicon dioxide films.
    8.
    发明公开
    TEOS based plasma enhanced chemical vapor deposition process for deposition of silicon dioxide films. 失效
    热CVD / PECVD反应器和用于二氧化硅和本地多步平面化方法的热化学气相沉积的用途

    公开(公告)号:EP0272140A3

    公开(公告)日:1990-11-14

    申请号:EP87311193.4

    申请日:1987-12-18

    摘要: A high pressure, high throughput, single wafer, semiconductor processing reactor (10) is disclosed which is capable of thermal CVD, plasma-enhanced CVD, plasma-assisted etchback, plasma self-cleaning, and deposition topography modification by sputtering, either separately or as part of in-situ multiple step processing. The reactor includes cooperating arrays of interdigitated susceptor (16) and wafer fingers (20) which collectively remove the wafer (15) from a robot transfer blade (24) and position the wafer with variable, controlled, close parallel spacing between the wafer and the chamber gas inlet manifold (26) then return the wafer to the blade. A combined RF/gas feed-through device (36) protects against process gas leaks and applies RF energy to the gas inlet manifold without internal breakdown or deposition of the gas. The gas inlet manifold (26) is adapted for providing uniform gas flow over the wafer. Temperature-controlled internal and external manifold surfaces suppress condensation, premature reactions and decomposition and deposition on the external surfaces. The reactor also incorporates a uniform radial pumping gas system which enables uniform reactant gas flow across the wafer and directs purge gas flow downwardly and upwardly toward the periphery of the wafer for sweeping exhaust fases radially away from the wafer to prevent deposition outside the wafer and keep the chamber clean. The reactor provides uniform processing over a wide range of pressure including very high pressures. A low temperature CVD process for forming a highly conformal layer of silicon dioxide is also disclosed. The process uses very high chamber pressure and low temperature, and TEOS and ozone reactants. The low temperature CVD silicon dioxide deposition step is particularly useful for planarizing underlying stepped dielectric layers, either alone on in conjunction with a subsequent isotropic etch. A preferred in-situ multiple-step process for forming a planarized silicon dioxide layer uses (1) high rate silicon dioxide deposition at a low temperature and high pressure followed by (2) the deposition of the conformal silicon dioxide layer also at high pressure and low temperature, followed by (3) a high rate isotropic etch, preferably at low temperature and high pressure in the same reactor used for the two oxide deposition steps. Various combinations of the steps are disclosed for different applications, as is a preferred reactor self-cleaning step.

    Showerhead for semiconductor processing chamber
    9.
    发明公开
    Showerhead for semiconductor processing chamber 审中-公开
    喷头分发用于半导体处理腔室的工艺气体

    公开(公告)号:EP1167571A3

    公开(公告)日:2002-04-10

    申请号:EP01305218.8

    申请日:2001-06-15

    摘要: The disclosure relates to a showerhead for distributing gases in a semiconductor process chamber (100). In one embodiment, a showerhead (118) comprising a perforated center portion (214), a mounting portion (202) circumscribing the perforated center portion and a plurality of bosses (210) extending from the mounting portion each having a hole disposed therethrough is provided. Another embodiment of the invention provides a showerhead that includes a mounting portion (202) having a first side circumscribing a perforated center portion (214). A ring (304) extends from the first side of the mounting portion. A plurality of mounting holes (306) are disposed in the mounting portion radially to either side of the ring. The showerhead provides controlled thermal transfer between the showerhead and chamber lid resulting in less deposition on the showerhead.

    Lid assembly for a semiconductor processing chamber
    10.
    发明公开
    Lid assembly for a semiconductor processing chamber 审中-公开
    用于半导体处理室的盖组件

    公开(公告)号:EP1167572A2

    公开(公告)日:2002-01-02

    申请号:EP01305356.6

    申请日:2001-06-20

    摘要: A lid assembly for distributing gases in a semiconductor process chamber (202). In one embodiment, a lid assembly (210) comprising a perforated center portion (218), a mounting portion (1202) circumscribing the perforated center portion and a plurality of bosses (1210) extending from the mounting portion each having a hole (1306) disposed therethrough is provided. Another embodiment of the invention provides a showerhead (218) that includes a mounting portion having a first side (1206) circumscribing a perforated center portion. A ring extends from the first side of the mounting portion. A plurality of mounting holes are disposed in the mounting portion radially to either side of the ring. The showerhead provides controlled thermal transfer between the showerhead and chamber lid resulting in less deposition on the showerhead.

    摘要翻译: 盖组件,用于在半导体处理室(202)中分配气体。 在一个实施例中,包括穿孔中心部分(218),外接穿孔中心部分的安装部分(1202)和从安装部分延伸的多个凸起(1210)的盖组件(210)均具有孔(1306) 设置在其中。 本发明的另一个实施例提供了一种喷头(218),其包括具有围绕穿孔中心部分的第一侧(1206)的安装部分。 环从安装部分的第一侧延伸。 多个安装孔径向地设置在环的任一侧的安装部中。 喷头在喷头和室盖之间提供可控的热传递,从而减少喷头上的沉积。