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    A TAILORED BARRIER LAYER WHICH PROVIDES IMPROVED COPPER INTERCONNECT ELECTROMIGRATION RESISTANCE
    1.
    发明公开
    A TAILORED BARRIER LAYER WHICH PROVIDES IMPROVED COPPER INTERCONNECT ELECTROMIGRATION RESISTANCE 审中-公开
    具有改进的电阻迁移铜线量身订做触及LAYER

    公开(公告)号：EP1042806A1

    公开(公告)日：2000-10-11

    申请号：EP98956499.2

    申请日：1998-11-02

    申请人： APPLIED MATERIALS, INC.

    发明人： DING, Peijun ,  CHIANG, Tony ,  CHIN, Barry

    IPC分类号： H01L23/532

    CPC分类号： H01L21/76843 ,  H01L23/53233 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Disclosed herein is a barrier layer structure useful in forming copper interconnects and electrical contacts of semiconductor devices. The barrier layer structure comprises a first layer of TaNx which is applied directly over the substrate, followed by a second layer of Ta. The TaNx/Ta barrier layer structure provides both a barrier to the diffusion of a copper layer deposited thereover, and enables the formation of a copper layer having a high {111} crystallographic content so that the electromigration resistance of the copper is increased. The TaNx layer, where x ranges from about 0.1 to about 1.5, is sufficiently amorphous to prevent the diffusion of copper into the underlying substrate, which is typically silicon or a dielectric such as silicon dioxide. The thickness of the TaNx and Ta layers used for an interconnect depend on the feature size and aspect ratio; typically, the TaNx layer thickness ranges from about 50 Å to about 1,000 Å, while the Ta layer thickness ranges from about 20 Å to about 500 Å. For a contact via, the permissible layer thickness on the via walls must be even more carefully controlled based on feature size and aspect ratio; typically, the TaNx layer thickness ranges from about 10 Å to about 300 Å, while the Ta layer thickness ranges from about 5 Å to about 300 Å. The copper layer is deposited at the thickness desired to suit the needs of the device. The copper layer may be deposited using any of the preferred techniques known in the art. Preferably, the entire copper layer, or at least a 'seed' layer of copper, is deposited using physical vapor deposition techniques such as sputtering or evaporation, as opposed to CVD or electroplating. Since the crystal orientation of the copper is sensitive to deposition temperature, and since the copper may tend to dewet/delaminate from the barrier layer if the temperature is too high, it is important that the copper be deposited and/or annealed at a temperature of less than about 500 °C, and preferably at a temperature of less than about 300 °C.

    TANTALUM FILMS AND METHODS FOR THEIR DEPOSITION
    3.
    发明公开
    TANTALUM FILMS AND METHODS FOR THEIR DEPOSITION 审中-公开
    钽薄膜和方法及其

    公开(公告)号：EP1115898A1

    公开(公告)日：2001-07-18

    申请号：EP99949747.2

    申请日：1999-09-21

    申请人： Applied Materials, Inc.

    发明人： CHIANG, Tony ,  DING, Peijun ,  CHIN, Barry

    IPC分类号： C23C14/16 ,  C23C14/06 ,  H01L21/768 ,  H01L21/285

    CPC分类号： H01L21/76843 ,  C23C14/0641 ,  C23C14/165 ,  C23C14/541 ,  C23C14/5806 ,  H01L21/28556 ,  H01L21/318 ,  H01L21/76864 ,  Y10T428/31678

    摘要： We have discovered that, by depositing a tantalum layer upon a substrate at a temperature of at least 325 °C, it is possible to obtain an ultra low resistivity. In addition, it is possible to deposit a TaxNy film having an ultra low resistivity by depositing the TaxNy film upon a substrate at a temperature of at least 275 °C, wherein x is 1 and y ranges from about 0.05 to about 0.18. A combination of elevated substrate temperature and ion bombardment of the film surface during deposition enables the use of lower substrate temperatures while maintaining film properties. In another development, we have discovered that the ultra low resistivity tantalum and TaxNy films produced by the method of the present invention also exhibit particularly low residual stress. Further, these films can be chemical mechanical polished at significantly higher rates (at least 40 % higher rates) than higher resistivity tantalum and TaxNy. This is particularly useful in damascene processes when copper is used as the interconnect metal, since it reduces the possibility of copper dishing during a polishing step.

    DAMAGE-FREE SCULPTURED COATING DEPOSITION
    4.
    发明公开
    DAMAGE-FREE SCULPTURED COATING DEPOSITION 审中-公开
    破坏性涂法

    公开(公告)号：EP1034566A1

    公开(公告)日：2000-09-13

    申请号：EP98956259.0

    申请日：1998-10-26

    申请人： Applied Materials, Inc.

    发明人： CHIANG, Tony ,  YAO, Gongda ,  DING, Peijun ,  CHEN, Fusen ,  CHIN, Barry ,  KOHARA, Gene ,  XU, Zheng ,  ZHANG, Hong

    IPC分类号： H01L21/768

    CPC分类号： H01L21/76843 ,  C23C14/046 ,  C23C14/165 ,  H01L21/2855 ,  H01L21/76805 ,  H01L21/76844 ,  H01L21/76846 ,  H01L21/76862 ,  H01L21/76865 ,  H01L21/76871 ,  H01L21/76877 ,  H01L21/76879 ,  H01L21/76883

    摘要： We disclose a method of applying a sculptured layer of material on a semiconductor feature surface using ion deposition sputtering, wherein a surface onto which the sculptured layer is applied is protected to resist erosion and contamination by impacting ions of a depositing layer, said method comprising the steps of: a) applying a first position of a sculptured layer with sufficiently low substrate bias that a surface onto which said sculptured layer is applied is not eroded away or contaminated in an amount which is harmful to said semiconductor device performance or longevity; and b) applying a subsequent portion of said sculptured layer with sufficiently high substrate bias to sculpture a shape from said first portion, while depositing additional layer material. The method is particularly applicable to the sculpturing of barrier layers, wetting layers, and conductive layers upon semiconductor feature surfaces and is especially helpful when the conductive layer is copper. In the application of a barrier layer, a first portion of barrier layer material is deposited on the substrate surface using standard sputtering techniques or using an ion deposition plasma, but in combination with sufficiently low substrate bias voltage (including at no applied substrate voltage) that the surfaces impacted by ions are not sputtered in an amount which is harmful to device performance or longevity. Subsequently, a second portion of barrier material is applied using ion deposition sputtering at increased substrate bias voltage which causes resputtering (sculpturing) of the first portion of barrier layer material, while enabling a more anisotropic deposition of newly depositing material. A conductive material, and particularly a copper seed layer applied to the feature may be accomplished using the same sculpturing technique as that described above with reference to the barrier layer.

    PLANETARY MAGNETRON
    7.
    发明公开
    PLANETARY MAGNETRON 审中-公开
    行星磁控管

    公开(公告)号：EP1506565A1

    公开(公告)日：2005-02-16

    申请号：EP03726907.3

    申请日：2003-05-16

    申请人： Applied Materials, Inc.

    发明人： HONG, Ilyoung, Richard ,  TSUNG, James, H. ,  MILLER, Michael, Andrew ,  LUBBEN, Daniel, C. ,  DING, Peijun ,  MAITY, Nirmalya

    IPC分类号： H01J37/34

    CPC分类号： H01J37/3408 ,  H01J37/3455

    摘要： A small unbalanced magnet assembly (60) is scanned in a preferably retrograde planetary or epicyclic path (92) about the back of a target (90) being plasma sputtered including an orbital rotation about the center axis (72) of the target and a planetary rotation about another axis rotating about the target center axis. The magnet assembly may pass through the target center, thus allowing full target coverage. A geared planetary mechanism may include a rotating drive plate (74), a fixed center gear (62), and an idler gear (76) and a follower gear (74) rotatably supported in the drive plate supporting a cantilevered magnet assembly (84) on the side of the drive plate facing the target. A belt (342) and pulleys (344, 346) may be substituted for the gears. The erosion profile may be controlled by varying the rotation rate through the rotation cycle or by modulating the target power. A second planetary stage (302, 304, 306) may be added or non-circular gears (310) be used. Auxiliary electromagnetic coils (254, 258) positioned beside the chamber and below the pedestal (122) may create a focusing magnetic field.

    REFLOW CHAMBER AND PROCESS
    9.
    发明公开
    REFLOW CHAMBER AND PROCESS 审中-公开
    反流室与方法

    公开(公告)号：EP1060511A2

    公开(公告)日：2000-12-20

    申请号：EP99906955.2

    申请日：1999-02-11

    申请人： Applied Materials, Inc.

    发明人： WANG, Hougong ,  LAI, Steve ,  YAO, Gongda ,  DING, Peijun

    IPC分类号： H01L21/768

    CPC分类号： H01L21/76877 ,  C23C16/4404 ,  Y10T24/44017

    摘要： A method and apparatus for reflowing a material layer is provided. The inventive method introduces into a reflow chamber a material which is at least as reactive or more reactive than a material to be reflowed (i.e., a gettering material). Preferably the gettering material is sputter deposited within the reflow chamber while a shield prevents the gettering material from reaching the material layer to be reflowed. The shield may be coupled to, or integral with a clamp for clamping a wafer (containing the material layer to be reflowed) to a wafer support provided sufficient venting exists so that contaminants degassed from the wafer may flow to the region between the sputtering target and the shield where the contaminants can react with gettering material. The shield may have a roughened top surface (the surface that faces the sputtering target) which deters gettering material from flaking off the shield and/or the shield may have a reflective bottom surface (the surface that faces the wafer) that reflects heat to the water.