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    Sensing circuit and method for diagnosing open and short circuit conditions of a sensor
    3.
    发明公开
    Sensing circuit and method for diagnosing open and short circuit conditions of a sensor 审中-公开
    测量电路和方法，用于检测一个刀的开路和短路条件

    公开(公告)号：EP1903322A3

    公开(公告)日：2010-05-26

    申请号：EP07116408.1

    申请日：2007-09-14

    Applicant: Delphi Technologies, Inc.

    Inventor： Kamel, Ashraf K. ,  Koseluk, Robert W. ,  Gertiser, Kevin M. ,  Hach, Larry R.

    IPC: G01L23/22 ,  G01D18/00

    CPC classification number: G01L23/225 ,  G01D3/08 ,  G01R31/2829

    Abstract: A sensing circuit (50) for detecting open and short circuit conditions in sensors (20) is provided. The sensing circuit (50) includes switching circuitry ( t1 ,t1-t5), a voltage supply (VBIAS), a test capacitor (32), and an operational amplifier (30). The switching circuitry ( t1 ,t1-t5) is electrically coupled to the voltage supply (VBIAS), test capacitor (32), operational amplifier (30), and a sensor (20). The sensing circuit (50) is configured to provide for a normal operating mode in which the sensing circuit (50) provides an output indicative of a voltage across the sensor (20), and a charging mode in which the test capacitor (32) is coupled to the sensor (20) and operational amplifier (30) and charged to a steady state, and in which the output (35) of the operational amplifier (30) is a function of the test capacitor (32) capacitance and the capacitance of the sensor (20). A method for detecting open and short circuit conditions in sensors (20) is also provided.

    Configurable high/low side driver using a low-side fet pre-driver
    6.
    发明公开
    Configurable high/low side driver using a low-side fet pre-driver 有权
    Konfigurierbarer高/低侧 - 低端低端 - Vortreiber

    公开(公告)号：EP1686690A2

    公开(公告)日：2006-08-02

    申请号：EP06075132.8

    申请日：2006-01-20

    Applicant: Delphi Technologies, Inc.

    Inventor： Nair, Balakrishnan V. ,  Gertiser, Kevin M.

    IPC: H03K19/0175

    CPC classification number: H03K17/18 ,  H03K17/063 ,  H03K17/0822 ,  H03K17/6877 ,  H03K2217/0063

    Abstract: A high-side driver circuit for driving a load, including a low-side driver IC (12) having a drive output (16) and a feedback input (18), a first transistor (Q1) coupled to the drive output (12), and a second transistor (M1) coupled between a power source and the load. The second transistor (M1) is configured to enter an "OFF" state when the first transistor (Q1) is driven into an "OFF" state by the drive output, and to enter an "ON" state when the first transistor (Q1) is driven into an "ON" state by the drive output.

    Abstract translation: 一种用于驱动负载的高侧驱动电路，包括具有驱动输出（16）和反馈输入（18）的低侧驱动器IC（12），耦合到驱动输出（12）的第一晶体管（Q1） 以及耦合在电源和负载之间的第二晶体管（M1）。 当第一晶体管（Q1）由驱动输出驱动为“关”状态时，第二晶体管（M1）被配置为进入“关”状态，并且当第一晶体管（Q1） 被驱动输出驱动到“ON”状态。

    Semiconductor device heat sink package and method
    7.
    发明公开
    Semiconductor device heat sink package and method 审中-公开
    Halbleiter-Kühlgehäuseund Methode

    公开(公告)号：EP1523036A2

    公开(公告)日：2005-04-13

    申请号：EP04077669.2

    申请日：2004-09-28

    Applicant: Delphi Technologies, Inc.

    Inventor： Mandel, Larry M. ,  Sarma, Dwadasi H. ,  Gertiser, Kevin M. ,  Zimmerman, David W. ,  Chengalva, Suresh K.

    IPC: H01L23/367 ,  H01L25/065

    CPC classification number: H01L23/42 ,  H01L25/0655 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: An electronic package (10) having enhanced heat dissipation is provided exhibiting dual conductive heat paths (40, 42) in opposing directions. The package (10) includes a substrate (18) and a semiconductor device (12) mounted to the substrate (18). The semiconductor device (12) has electrical circuitry a first surface, and a second surface oppositely disposed from the first surface. A thermally conductive heat sink (30) is assembled over the semiconductor device (12) such that a cavity (32) is formed between the semiconductor device (12) and the heat sink (30). A thermally conductive and electrically insulative material (36) is disposed in the cavity (32) between the semiconductor device (12) and the heat sink (30).

    Abstract translation: 提供具有增强的散热的电子封装（10），其在相反的方向上呈现出双重传导热路（40,42）。 封装（10）包括衬底（18）和安装到衬底（18）的半导体器件（12）。 半导体器件（12）具有电路，第一表面和与第一表面相对设置的第二表面。 导热散热器（30）组装在半导体器件（12）上，使得在半导体器件（12）和散热器（30）之间形成空腔（32）。 导热和电绝缘材料（36）设置在半导体器件（12）和散热器（30）之间的空腔（32）中。

    Flip chip heat sink package and method
    10.
    发明公开
    Flip chip heat sink package and method 审中-公开
    FlipchipKühlgehäuseund Methode

    公开(公告)号：EP1523040A2

    公开(公告)日：2005-04-13

    申请号：EP04077702.1

    申请日：2004-09-30

    Applicant: Delphi Technologies, Inc.

    Inventor： Chengalva, Suresh K. ,  Mandel, Larry M. ,  Sarma, Dwadasi H. ,  Gertiser, Kevin M. ,  Zimmerman, David W.

    IPC: H01L25/065 ,  H01L23/367

    CPC classification number: H01L23/427 ,  H01L21/4878 ,  H01L21/4882 ,  H01L21/563 ,  H01L23/3675 ,  H01L23/3677 ,  H01L23/42 ,  H01L2224/16 ,  H01L2224/73204 ,  H01L2224/73253 ,  Y10T29/49144

    Abstract: An electronic package (10) having enhanced heat dissipation is provided exhibiting dual conductive heat paths (40, 42) in opposing directions. The package (10) includes a substrate (16) having electrical conductors thereon and a flip chip (12) mounted to the substrate (16). The flip chip (12) has a first surface, solder bumps (14) on the first surface, and a second surface oppositely disposed from the first surface. The flip chip (12) is mounted to the substrate (16) such that the solder bumps (14) are registered with the conductors on the substrate (16). The package (10) further includes a stamped metal heat sink (30) in heat transfer relationship with the second surface of the flip chip (12). The heat sink (30) includes a cavity (32) formed adjacent to the flip chip (12) containing a thermally conductive material (34).

    Abstract translation: 提供具有增强的散热的电子封装（10），其在相反的方向上呈现出双重传导热路（40,42）。 封装（10）包括其上具有电导体的衬底（16）和安装到衬底（16）的倒装芯片（12）。 倒装芯片（12）具有第一表面，第一表面上的焊料凸块（14）和与第一表面相对设置的第二表面。 倒装芯片（12）安装到基板（16），使得焊料凸块（14）与基板（16）上的导体对准。 封装（10）还包括与倒装芯片（12）的第二表面传热关系的冲压金属散热器（30）。 散热器（30）包括与包含导热材料（34）的倒装芯片（12）相邻形成的空腔（32）。

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