公开(公告)号：EP0476296B1

公开(公告)日：1997-01-15

申请号：EP91113498.9

申请日：1991-08-12

申请人： HITACHI, LTD.

发明人： Honma, Hideo ,  Satou, Yukimasa ,  Murakami, Susumu ,  Yatsuo, Tsutomu ,  Sanpei, Isamu ,  Yagishita, Kenji

IPC分类号： H01L29/744 ,  H01L29/739 ,  H01L29/423

CPC分类号： H01L29/42308 ,  H01L29/45 ,  H01L29/744

公开(公告)号：EP0391337A3

公开(公告)日：1991-04-24

申请号：EP90106348.7

申请日：1990-04-03

申请人： HITACHI, LTD.

发明人： Odai, Shingo ,  Sakurada, Shuroku ,  Ozeki, Toshiyuki ,  Sato, Yukimasa ,  Yatsuo, Tsutomu ,  Shimizu, Yoshiteru ,  Sanpei, Isamu ,  Yagishita, Kenji

IPC分类号： H01L29/74 ,  H01L29/08

CPC分类号： H01L29/0834 ,  H01L29/744

摘要： A gate turn-off thyristor provided with a disc-shaped semiconductor substrate consisting of at least 4 layers of pnpn forming pn junctions between different layers adjacent to each other, in which the emitter layer (16) on the cathode side is divided into a plurality of elongated regions arranged in the radial direction and disposed in a plurality of rings, in which the base layer (14) on the anode side is formed so as to be connected partially with the anode electrode (2) disposed on the emitter layer on the anode side by a short-circuiting layer having the same conductivity type as the base layer and the short-circuiting layer described above has a coaxial circular pattern, characterized in that the short-circuiting layer described above is formed at least within the part, where the regions between different rings of the emitter layer on the cathode side are projected on the anode side.

公开(公告)号：EP0391337A2

公开(公告)日：1990-10-10

申请号：EP90106348.7

申请日：1990-04-03

申请人： HITACHI, LTD.

发明人： Odai, Shingo ,  Sakurada, Shuroku ,  Ozeki, Toshiyuki ,  Sato, Yukimasa ,  Yatsuo, Tsutomu ,  Shimizu, Yoshiteru ,  Sanpei, Isamu ,  Yagishita, Kenji

IPC分类号： H01L29/74 ,  H01L29/08

CPC分类号： H01L29/0834 ,  H01L29/744

摘要： A gate turn-off thyristor provided with a disc-shaped semiconductor substrate consisting of at least 4 layers of pnpn forming pn junctions between different layers adjacent to each other, in which the emitter layer (16) on the cathode side is divided into a plurality of elongated regions arranged in the radial direction and disposed in a plurality of rings, in which the base layer (14) on the anode side is formed so as to be connected partially with the anode electrode (2) disposed on the emitter layer on the anode side by a short-circuiting layer having the same conductivity type as the base layer and the short-circuiting layer described above has a coaxial circular pattern, characterized in that the short-circuiting layer described above is formed at least within the part, where the regions between different rings of the emitter layer on the cathode side are projected on the anode side.

摘要翻译： 一种栅极截止晶闸管，其设置有由至少4层pnpn组成的盘状半导体衬底，所述pnpn形成彼此相邻的不同层之间的pn结，其中阴极侧的发射极层（16）被分成多个 在多个环中布置的细长区域，其中阳极侧的基底层（14）形成为与设置在发射极层上的阳极电极（2）部分连接， 通过具有与基底层相同的导电类型的短路层和上述短路层的阳极侧具有同轴的圆形图案，其特征在于，上述短路层至少形成在该部分内，其中 阴极侧的发射极层的不同环之间的区域突出在阳极侧。

公开(公告)号：EP0009367B1

公开(公告)日：1985-02-06

申请号：EP79301874.8

申请日：1979-09-12

申请人： Hitachi, Ltd.

发明人： Nagano, Takahiro ,  Sanpei, Isamu ,  Sakurada, Shuroku ,  Nakagawa, Masaru

IPC分类号： H01L29/08 ,  H01L29/743

CPC分类号： H01L29/66363 ,  H01L29/0834 ,  H01L29/744

公开(公告)号：EP0391337B1

公开(公告)日：1998-11-18

申请号：EP90106348.7

申请日：1990-04-03

申请人： Hitachi, Ltd.

发明人： Odai, Shingo ,  Sakurada, Shuroku ,  Ozeki, Toshiyuki ,  Sato, Yukimasa ,  Yatsuo, Tsutomu ,  Shimizu, Yoshiteru ,  Sanpei, Isamu ,  Yagishita, Kenji

IPC分类号： H01L29/744 ,  H01L29/08

CPC分类号： H01L29/0834 ,  H01L29/744

公开(公告)号：EP0476296A1

公开(公告)日：1992-03-25

申请号：EP91113498.9

申请日：1991-08-12

申请人： HITACHI, LTD.

发明人： Honma, Hideo ,  Satou, Yukimasa ,  Murakami, Susumu ,  Yatsuo, Tsutomu ,  Sanpei, Isamu ,  Yagishita, Kenji

IPC分类号： H01L29/744 ,  H01L29/739 ,  H01L29/423

CPC分类号： H01L29/42308 ,  H01L29/45 ,  H01L29/744

摘要： In a turn off type semiconductor device, an n-type emitter layer (16) is divided into a plurality of elements (16a) by trenches (17). A silicide layer (3) of a high melting point metal is provided on a p-type layer (15) adjacent to the individual elements (16a) of the n-type emitter layer (16) on a bottom of each of the trenches (17). A gate electrode (4) is provided on the associated silicide layer so as to surround the plurality of elements (16a) of the n-type emitter layer (16) obtained by the division of the emitter layer. An insulator (5) is filled in each of the trenches (17) dividing the n-type emitter layer (16) surrounded by the gate electrode (4). A cathode electrode (6) is provided on both the insulators (5) and the n-type emitter layer (16).

摘要翻译： 在一个关断型半导体器件中，n型发射极层（16）由沟槽（17）划分成元件（16A）的复数。 高熔点金属的硅化物层（3）设置在p型层上（15）相邻的n型发射极层（16）的每个沟槽的底部的各个元件（16A）（ 17）。 的栅电极（4）被设置在相关联的硅化物层上，以围绕由所述发射极层的划分而获得的n型发射极层（16）的元件（16A）的多元性。 绝缘体上（5）沟槽在每个（17）的填充除以栅电极（4）所包围的n型发射极层（16）。 阴极电极（6）被设置在这两个绝缘体（5）和所述n型发射极层（16）。

公开(公告)号：EP0231895A3

公开(公告)日：1988-01-13

申请号：EP87101272

申请日：1987-01-30

申请人： HITACHI, LTD.

发明人： Satou, Yukimasa ,  Yatsuo, Tsutomu ,  Oikawa, Saburo ,  Sanpei, Isamu

IPC分类号： H01L29/10 ,  H01L29/74 ,  H01L29/08

CPC分类号： H01L29/744 ,  H01L29/102 ,  H01L29/7428

摘要： The present invention relates to a buried gate type gate turn-off thyristor. A low-resistance layer which is buried in a cathode base layer has a multiplicity of small bores below a cathode emitter layer. The distance between each pair of adjacent small bores and the thickness of the low-resistance layer are each set so as to be smaller than the carrier diffusion length in an anode base layer. In an on-state, carries flow through the low-resistance layer, thereby allowing the low-resistance layer to become conductive, and thus lowering the on-state voltage. A reduction in the dimension of the small bores lowers the resistance of the low-resistance layer and hence lowers the gate drawing out resistance, so that the interrupting capacity is improved. When gate turn-off thyristor is arranged so as to have an amplifying gate structure, the distance between each pair of adjacent small bores in the amplifying auxiliary thyristor section is set so as to be greater than the carrier diffusion length in the anode base layer. In consequence, the on-state voltage in the auxiliary thyristor section is increased, so that the current selectively flows through the main thyristor section, and the auxiliary thyristor section automatically turns off. Accordingly, when the thyristor is to be turned off, it suffices to turn off the main thyristor section alone.

公开(公告)号：EP0231895A2

公开(公告)日：1987-08-12

申请号：EP87101272.0

申请日：1987-01-30

申请人： HITACHI, LTD.

发明人： Satou, Yukimasa ,  Yatsuo, Tsutomu ,  Oikawa, Saburo ,  Sanpei, Isamu

IPC分类号： H01L29/10 ,  H01L29/74 ,  H01L29/08

CPC分类号： H01L29/744 ,  H01L29/102 ,  H01L29/7428

摘要： The present invention relates to a buried gate type gate turn-off thyristor. A low-resistance layer which is buried in a cathode base layer has a multiplicity of small bores below a cathode emitter layer. The distance between each pair of adjacent small bores and the thickness of the low-resistance layer are each set so as to be smaller than the carrier diffusion length in an anode base layer. In an on-state, carries flow through the low-resistance layer, thereby allowing the low-resistance layer to become conductive, and thus lowering the on-state voltage. A reduction in the dimension of the small bores lowers the resistance of the low-resistance layer and hence lowers the gate drawing out resistance, so that the interrupting capacity is improved. When gate turn-off thyristor is arranged so as to have an amplifying gate structure, the distance between each pair of adjacent small bores in the amplifying auxiliary thyristor section is set so as to be greater than the carrier diffusion length in the anode base layer. In consequence, the on-state voltage in the auxiliary thyristor section is increased, so that the current selectively flows through the main thyristor section, and the auxiliary thyristor section automatically turns off. Accordingly, when the thyristor is to be turned off, it suffices to turn off the main thyristor section alone.

公开(公告)号：EP0009367A1

公开(公告)日：1980-04-02

申请号：EP79301874.8

申请日：1979-09-12

申请人： Hitachi, Ltd.

发明人： Nagano, Takahiro ,  Sanpei, Isamu ,  Sakurada, Shuroku ,  Nakagawa, Masaru

IPC分类号： H01L29/08 ,  H01L29/743

CPC分类号： H01L29/66363 ,  H01L29/0834 ,  H01L29/744

摘要： A gate turn-off thyristor of a short-circuited emitter configuration comprises a semiconductor substrate (1) of a P E -N B -P B -N E four-layer structure, wherein a P E -layer (2) is short-circuited through a N B -layer (3 and 4) and an anode (8). The N B -layer includes heavily doped regions (3) with which the anode is in ohmic contact with low resistance. The P E -layer (2) is at least partly at the area corresponding to the projection of the N E -layer (6) onto the surface contacted by the anode (8). The thickness of the heavily doped regions (3) is greater than of the P E -layer (2). This structure achieves satisfactory gate turn-off characteristics, although the semiconductor substrate is not doped with a life time killer impurity.