公开(公告)号：EP3136390B1

公开(公告)日：2018-11-28

申请号：EP15783125.6

申请日：2015-04-22

申请人： Huawei Technologies Co. Ltd.

发明人： FU, Yarong ,  ZHAO, Junfeng ,  WANG, Yuangang ,  YANG, Wei ,  LIN, Yinyin ,  YANG, Kai

IPC分类号： G11B5/012 ,  G11C19/08 ,  G11C11/16

CPC分类号： G11C11/1675 ,  G11B5/012 ,  G11B5/653 ,  G11B5/656 ,  G11C11/16 ,  G11C19/0841

摘要： Embodiments of the present invention provide a write apparatus and a magnetic memory, where the write apparatus includes: a first drive port, a second drive port, a first information storage area, a second information storage area, and an information buffer, where there is a first area between the first information storage area and the information buffer, there is a second area between the second information storage area and the information buffer, the first information storage area, the second information storage area, and the information buffer are made of a first magnetic material, the first area and the second area are made of a second magnetic material, and magnetic energy of the first magnetic material is higher than magnetic energy of the second magnetic material; the first information storage area is configured to write first data to the information buffer; the second information storage area is configured to write second data to the information buffer; and the information buffer is configured to buffer data written from the first information storage area or the second information storage area, and write the buffered data to a magnetic domain of the magnetic memory, which can ensure write stability of the magnetic memory.

公开(公告)号：EP3220277A1

公开(公告)日：2017-09-20

申请号：EP15875107.3

申请日：2015-12-18

申请人： Huawei Technologies Co. Ltd. ,  Fudan University

发明人： YANG, Renhua ,  ZHAO, Junfeng ,  YANG, Wei ,  WANG, Yuangang ,  LIN, Yinyin

IPC分类号： G06F13/28

CPC分类号： G06F12/0868 ,  G06F11/14 ,  G06F12/0246 ,  G06F12/0802 ,  G06F12/109 ,  G06F13/28 ,  G11C11/40615 ,  G11C11/40622 ,  Y02D10/13 ,  Y02D10/14 ,  Y02D10/151

摘要： Embodiments of the present invention provide a memory access method, a storage-class memory, and a computer system. The computer system includes a memory controller and a hybrid memory, and the hybrid memory includes a dynamic random access memory DRAM and a storage-class memory SCM. The memory controller is configured to send a first access instruction to the DRAM and the SCM. When determining that a first memory cell set that is of the DRAM and to which a first address in the received first access instruction points includes a memory cell whose retention time is shorter than a refresh cycle of the DRAM, the SCM may obtain a second address having a mapping relationship with the first address. Further, the SCM converts, according to the second address, the first access instruction into a second access instruction for accessing the SCM, to implement access to the SCM. The computer system provided in the embodiments of the present invention can ensure correctness of data while reducing power consumption for DRAM refresh.

摘要翻译： 本发明的实施例提供一种存储器存取方法，存储级存储器和计算机系统。 计算机系统包括存储器控制器和混合存储器，并且混合存储器包括动态随机存取存储器DRAM和存储级存储器SCM。 存储器控制器被配置为向DRAM和SCM发送第一访问指令。 当确定DRAM的第一存储单元组和第一存取指令点中的第一地址包括保持时间短于DRAM的刷新周期的存储单元时，SCM可以获得第二地址 与第一地址具有映射关系。 进一步地，SCM根据第二地址将第一访问指令转换为访问SCM的第二访问指令，以实现对SCM的访问。 本发明实施例提供的计算机系统可以保证数据的正确性，同时降低DRAM刷新的功耗。

公开(公告)号：EP3048747A1

公开(公告)日：2016-07-27

申请号：EP14845522.3

申请日：2014-09-12

申请人： Huawei Technologies Co., Ltd.

发明人： DONG, Xiaowen ,  ZHAO, Junfeng ,  YANG, Wei

IPC分类号： H04B10/116

CPC分类号： H04B10/116 ,  G01S11/12

摘要： The present invention relates to the field of communication processing technologies, and in particular, to a positioning method based on a visible light source, a mobile terminal, and a controller. Specifically, the method includes: acquiring, by a visible light source controller, geographical position attribute information of a position at which a visible light source array is located; determining, by the visible light source controller according to a preset correspondence between geographical position attribute information of a position at which a visible light source array is located and a visible light source array pattern, a visible light source array pattern corresponding to the acquired geographical position attribute information, where the visible light source array pattern refers to coding information formed by identification information that is separately used to identify a luminance state corresponding to each visible light source included in the visible light source array; and controlling, by the visible light source controller according to the determined visible light source array pattern, the luminance state of each visible light source included in the visible light source array. In this way, complexity of a positioning process is reduced, and a problem that a positioning method is relatively onefold is resolved.

摘要翻译： 本发明涉及通信处理技术领域，特别涉及基于可见光源，移动终端和控制器的定位方法。 具体地，该方法包括：通过可见光源控制器获取可见光源阵列所在的位置的地理位置属性信息; 根据可见光源阵列所在的位置的地理位置属性信息与可见光源阵列图案之间的预设对应关系，通过可见光源控制器确定与获取的地理位置对应的可见光源阵列图案 属性信息，其中可见光源阵列图案是指分别用于识别与包括在可见光源阵列中的每个可见光源相对应的亮度状态的识别信息形成的编码信息; 以及根据所确定的可见光源阵列图案，通过可见光源控制器控制包括在可见光源阵列中的每个可见光源的亮度状态。 以这种方式，定位处理的复杂度降低，并且解决了定位方法相对单一的问题。

公开(公告)号：EP4258371A1

公开(公告)日：2023-10-11

申请号：EP21914270.0

申请日：2021-12-27

申请人： Huawei Technologies Co., Ltd.

发明人： HE, Liang ,  YAN, Xin ,  ZHAO, Yafei ,  NING, Jiai ,  ZHAO, Junfeng ,  TANG, Wentao

IPC分类号： H01L43/08 ,  H01L43/12 ,  G11C11/16

摘要： Embodiments of this application provide a storage component, a preparation method, a reading/writing method, a storage chip, and an electronic device, is related to the storage technology field, and is used to resolve a problem that a quantity of storage states of a spin orbit torque-magnetic random access memory is increased while a storage state change range remains unchanged. The storage component includes: a first magnetic tunnel junction, a spin orbit coupling layer and a second magnetic tunnel junction that are sequentially arranged in a stacked manner. The first magnetic tunnel junction includes a first free layer, and the second magnetic tunnel junction includes a second free layer. The first free layer and the second free layer are arranged on two opposite surfaces of the spin orbit coupling layer.

公开(公告)号：EP4116825A1

公开(公告)日：2023-01-11

申请号：EP21780288.3

申请日：2021-03-26

申请人： Huawei Technologies Co., Ltd.

发明人： SHI, Liang ,  SHEN, Xiaolong ,  WANG, Weilan ,  ZHAO, Junfeng ,  LU, Fangmin ,  YAN, Xin

IPC分类号： G06F9/48

摘要： A device suspend method and a computing device are provided. In the method, before a device enters a suspend state, memory space occupied by a background process that is unrelated to a foreground process is released. In this way, the background process that is unrelated to the foreground process is not saved in a memory of the device. In other words, data stored in the memory when the device is suspended is reduced. Therefore, when the device needs to be woken up, only a relatively small amount of data needs to be read from the memory, and a working state can be rapidly restored. This can reduce a delay of reading data from the memory when the device is woken up, thereby accelerating a wakeup speed of the device. In addition, the data is stored in the memory when the device is suspended. Therefore, in the suspend state, power needs to be supplied only to the memory of the device, thereby ensuring low power consumption of the device.

公开(公告)号：EP3217406A1

公开(公告)日：2017-09-13

申请号：EP15862610.1

申请日：2015-11-28

申请人： Huawei Technologies Co., Ltd.

发明人： XIAO, Shihai ,  YANG, Wei ,  ZHAO, Junfeng

IPC分类号： G11C8/16

CPC分类号： G11C8/16 ,  G06F3/0659 ,  G11C8/10

摘要： A memory activation method and apparatus are provided, pertaining to the computer field. In this solution, a first memory access request is obtained, where the first memory access request is used to request to access a first sub-row in a memory (100); a to-be-scheduled queue of the memory is searched for a second memory access request, where the to-be-scheduled queue of the memory includes multiple memory access requests, the second memory access request is used to request to access a second sub-row in the memory, and the first sub-row and the second sub-row are located in a same row in the memory (110); the first memory access request and the second memory access request are combined to generate a first activation instruction, where the first activation instruction is used to instruct to activate the first sub-row and the second sub-row in the memory (120); and the first activation instruction is sent to the memory (130). In this way, the first sub-row and the second sub-row can be activated simultaneously, and it is unnecessary to precharge, after activation of the first sub-row, a row at which the first sub-row is located, and then activate the second sub-row. Therefore, efficiency of activation is improved.

摘要翻译： 提供了一种与计算机领域相关的存储器激活方法和装置。 在该解决方案中，获得第一存储器访问请求，其中第一存储器访问请求被用于请求访问存储器（100）中的第一子行; 在所述内存的待调度队列中查找第二内存访问请求，所述内存的待调度队列包括多个内存访问请求，所述第二内存访问请求用于请求访问第二子内存 并且第一子行和第二子行位于存储器（110）中的同一行中; 第一存储器访问请求和第二存储器访问请求被组合以生成第一激活指令，其中第一激活指令用于指示激活存储器（120）中的第一子行和第二子行; 并且第一启动指令被发送到存储器（130）。 这样，可以同时激活第一子行和第二子行，并且不必在激活第一子行之后预充电第一子行所在的行，然后， 激活第二个子行。 因此，激活效率提高。

公开(公告)号：EP3125248A1

公开(公告)日：2017-02-01

申请号：EP14890156.4

申请日：2014-04-22

申请人： Huawei Technologies Co., Ltd.

发明人： MIAO, Xiangshui ,  LI, Yi ,  ZHOU, Yaxiong ,  XU, Ronggang ,  ZHAO, Junfeng ,  ZHANG, Shujie

IPC分类号： G11C11/00

CPC分类号： H03K3/35625 ,  G11C13/0002 ,  H03K3/0372

摘要： Embodiments of the present invention provide a latch and a D flip-flop. The latch includes: a switch, a resistive random-access memory, a bleeder circuit, and a voltage converter. When the switch is in an on state, the voltage converter is configured to output an output signal of the latch according to an input signal of the latch, where the output signal remains consistent with the input signal. When the switch changes from the on state to an off state, the resistive random-access memory is configured to work together with the bleeder circuit to enable an output signal of the latch when the switch is in the off state to remain consistent with an output signal of the latch when the switch is in the on state, thereby implementing a nonvolatile latching function. Because fewer components are used in the latch in the embodiments of the present invention, a circuit structure is simple, a circuit area is reduced, and integrity of an existing logic circuit can be improved.

摘要翻译： 本发明的实施例提供一种锁存器和一个D触发器。 锁存器包括：开关，电阻式随机存取存储器，泄放电路和电压转换器。 当开关处于导通状态时，电压转换器被配置为根据锁存器的输入信号输出锁存器的输出信号，其中输出信号保持与输入信号一致。 当开关从导通状态改变到关断状态时，电阻随机存取存储器被配置为与泄放电路一起工作，以在开关处于断开状态时使锁存器的输出信号与输出保持一致 当开关处于导通状态时锁存器的信号，从而实现非易失性锁存功能。 由于本发明实施例中锁存器使用的元件较少，因此电路结构简单，电路面积减小，可以提高现有逻辑电路的完整性。

公开(公告)号：EP3188191B1

公开(公告)日：2019-11-06

申请号：EP14903436.5

申请日：2014-09-30

申请人： Huawei Technologies Co. Ltd.

发明人： HE, Rui ,  XU, Ronggang ,  ZHAO, Junfeng

IPC分类号： G11C19/28 ,  G11C13/00 ,  G11C14/00 ,  H03K3/00 ,  H03K3/356

公开(公告)号：EP3389051A1

公开(公告)日：2018-10-17

申请号：EP16885510.4

申请日：2016-01-18

申请人： Huawei Technologies Co., Ltd. ,  Nanyang Technological University

发明人： YU, Hao ,  WANG, Yuhao ,  ZHAO, Junfeng ,  YANG, Wei ,  XIAO, Shihai ,  NI, Leibin

IPC分类号： G11C11/21

摘要： Embodiments of the present invention provide a memory device. The memory device includes an RRAM crossbar array that is configured to perform a logic operation, and resistance values of resistors in the RRAM crossbar array are all set to R on or R off to indicate a Boolean value 1 or 0. Based on the foregoing setting, a Boolean operation is implemented by using the RRAM crossbar array, so that reliability of a logic operation of the RRAM crossbar array can be improved.

公开(公告)号：EP3188191A1

公开(公告)日：2017-07-05

申请号：EP14903436.5

申请日：2014-09-30

申请人： Huawei Technologies Co. Ltd.

发明人： HE, Rui ,  XU, Ronggang ,  ZHAO, Junfeng

IPC分类号： G11C19/28

CPC分类号： G11C13/004 ,  G11C13/0069 ,  G11C13/0097 ,  G11C14/009 ,  G11C19/28 ,  G11C19/287 ,  G11C2013/0073 ,  H03K3/356104 ,  H03K3/356113 ,  H03K3/356121

摘要： A circuit and an array circuit for implementing a shift operation are provided. The circuit for implementing a shift operation includes a resistive random-access memory and four switches, where a first switch is closed when a first end of the first switch is at a low level, a fourth switch is closed when a first end of the fourth switch is at a low level, a second switch is closed when a first end of the second switch is at a high level, and a third switch is closed when a first end of the third switch is at a high level; a second end of the first switch and a second end of the third switch are connected to a negative input end of the resistive random-access memory; a second end of the second switch and a second end of the fourth switch are connected to a positive input end of the resistive random-access memory; the first end of the first switch, the first end of the second switch, the first end of the third switch, and the first end of the fourth switch are connected to an output end of a previous-stage circuit for implementing a shift operation; a third end of the first switch and a third end of the second switch are connected to a bias voltage end; and a third end of the third switch and a third end of the fourth switch are connected to a ground end. The shift circuit has a simple structure and can improve computational efficiency.

摘要翻译： 提供了用于实现移位操作的电路和阵列电路。 用于实现移位操作的电路包括电阻随机存取存储器和四个开关，其中当第一开关的第一端处于低电平时第一开关闭合，当第四开关的第一端闭合时第四开关闭合 开关处于低电平，当第二开关的第一端处于高电平时，第二开关闭合，并且当第三开关的第一端处于高电平时，第三开关闭合; 所述第一开关的第二端和所述第三开关的第二端连接所述电阻式随机存取存储器的负输入端; 所述第二开关的第二端和所述第四开关的第二端连接所述电阻式随机存取存储器的正输入端; 所述第一开关的第一端，所述第二开关的第一端，所述第三开关的第一端和所述第四开关的第一端连接到用于实现移位操作的前一级电路的输出端; 所述第一开关的第三端和所述第二开关的第三端连接到偏置电压端; 并且第三开关的第三端和第四开关的第三端连接到接地端。 移位电路结构简单，可以提高计算效率。