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12 条记录 (耗时 0.018 秒)

    CMOS-KOMPATIBLER LATERALER DMOS-TRANSISTOR
    2.
    发明授权
    CMOS-KOMPATIBLER LATERALER DMOS-TRANSISTOR 有权
    CMOS兼容的横向DMOS晶体管

    公开(公告)号：EP1273043B1

    公开(公告)日：2011-06-22

    申请号：EP01927619.5

    申请日：2001-03-24

    申请人： IHP GmbH-Innovations for High Performance Microelectronics / Leibniz-Institut für innovative Mikroelektronik

    发明人： EHWALD, Karl-Ernst ,  HEINEMANN, Bernd ,  KNOLL, Dieter ,  WINKLER, Wolfgang

    IPC分类号： H01L29/78 ,  H01L29/10 ,  H01L21/336

    CPC分类号： H01L29/66659 ,  H01L29/0615 ,  H01L29/1033 ,  H01L29/7835

    摘要： The invention relates to a CMOS-compatible lateral DMOS transistor and to a method for producing such a transistor. The aim of the invention is to provide a CMOS-compatible DMOS transistor that can be optionally designed for very high drain voltages or for the power amplification at very high frequencies by choosing the appropriate layout and that can be produced with little additional technical effort as compared to the conventional sub-νm production technology for CMOS circuits. To this end, a gate insulator of the inventive CMOS-compatible lateral DMOS transistor has a uniform thickness across the entire current-carrying (active) zone below a control gate. Below said control gate, a surface-near zone with increased dopant concentration (well region) that determines the transistor threshold voltage is disposed in such a manner that it occupies the entire area below the control gate disposed in the active zone and that it terminates within a so-called drift region between the control gate and a highly-doped drain region. The entire surface of the drift region is covered by a zone having the conductivity type of the drain region (VLDD) and being poorly doped as compared to the highly doped drain region.

    HOCHGESCHWINDIGKEITS-GERMANIUM-PIN-FOTODIODE
    3.
    发明公开
    HOCHGESCHWINDIGKEITS-GERMANIUM-PIN-FOTODIODE 有权
    HOCHGESCHWINDIGKEITS锗PIN-FOTODIODE

    公开(公告)号：EP3096362A1

    公开(公告)日：2016-11-23

    申请号：EP16166948.6

    申请日：2016-04-25

    申请人： IHP GmbH-Innovations for High Performance Microelectronics / Leibniz-Institut für innovative Mikroelektronik

    发明人： KNOLL, Dieter ,  LISCHKE, Stefan

    IPC分类号： H01L31/105 ,  G02B6/42

    CPC分类号： H01L31/105 ,  G02B6/42 ,  H01L31/02005 ,  H01L31/022408 ,  H01L31/02327 ,  H01L31/0288

    摘要： Es wird eine Diode beschrieben, mit einem lichtempfindlichen Germanium-Gebiet (5), das sich auf einem Wellenleiter (2) aus Silizium oder Silizium-Germanium befindet und das im Vergleich mit dem Wellenleiter identische oder um maximal 20 nm pro Seite kürzere laterale Abmessungen in einer Richtung quer zu einer Lichtausbreitungsrichtung im Wellenleiter hat. Die Diode im Germaniumgebiet enthält eine laterale Anordnung eines N-dotierten (5b), eines intrisischen (5) und eines P-dotierten (5a) Germanium-Gebiets. Ausserdem schliessen sich seitlich an die P- und N-dotierten Gebiete (5a, 5b) im Germanium-Gebiet weitere homogen dotierte Ausläufer (6a, 6b) aus Silizium oder Silizium-Germanium an, die sich in vertikaler Richtung mindestens bis zu einem Niveau erstrecken, welches auf gleicher Höhe ist wie ein in der vertikalen Richtung höchster Punkt des Germanium-Gebiets (5).

    摘要翻译： 描述了一种二极管，其包括位于由硅或硅锗制成的波导（2）上的光敏锗区（5），并且在与波导中的光传播方向横切的横向尺寸相同或相同， 与波导相比，每侧最多20nm更短。

    BIPOLARTRANSISTOR UND VERFAHREN ZU SEINER HERSTELLUNG
    6.
    发明授权
    BIPOLARTRANSISTOR UND VERFAHREN ZU SEINER HERSTELLUNG 有权
    双极晶体管及其制造方法

    公开(公告)号：EP1116278B1

    公开(公告)日：2012-06-13

    申请号：EP99955792.9

    申请日：1999-09-20

    申请人： IHP GmbH-Innovations for High Performance Microelectronics / Leibniz-Institut für innovative Mikroelektronik

    发明人： DREWS, Jürgen ,  TILLACK, Bernd ,  HEINEMANN, Bernd ,  KNOLL, Dieter

    IPC分类号： H01L29/737 ,  H01L21/331 ,  H01L29/732

    CPC分类号： H01L29/66287 ,  H01L29/66242 ,  H01L29/7322 ,  H01L29/7378

    摘要： The invention relates to a bipolar transistor and a method for producing same. The aim of the invention is to provide a bipolar transistor and a method for producing same, which during the use of a single-process poly-silicon technology with differential epitaxis for the production of bases overcomes the disadvantages of conventional systems, so as notably further to improve the high-speed properties of a bipolar transistor, provide the most conductive connections possible between the metal contacts and the active (internal) transistor region as well as a minimized passive transistor surface, while at the same time avoiding greater process complexity and increased contact resistances. To this end a surface relief is produced in the active emitter region by a wet-chemical process. A single-process poly-silicon bipolar transistor having a base produced by epitaxis in accordance with the invention permits a reduction in external base resistance without causing a deterioration in emitter properties. Because the internal and external base regions are deposited continuously no interface problems arise during connection of the base. Base-collector capacity can also be lowered.

    KOMPLEMENTÄRE BIPOLAR-HALBLEITERVORRICHTUNG UND HERSTELLUNGSVERFAHREN
    7.
    发明授权
    KOMPLEMENTÄRE BIPOLAR-HALBLEITERVORRICHTUNG UND HERSTELLUNGSVERFAHREN 有权
    互补双极型半导体装置及方法

    公开(公告)号：EP2100330B1

    公开(公告)日：2012-03-07

    申请号：EP07847998.7

    申请日：2007-12-07

    申请人： IHP GmbH-Innovations for High Performance Microelectronics / Leibniz-Institut für innovative Mikroelektronik

    发明人： KNOLL, Dieter ,  HEINEMANN, Bernd ,  EHWALD, Karl-Ernst

    IPC分类号： H01L21/8228 ,  H01L21/8249 ,  H01L27/06 ,  H01L27/082

    CPC分类号： H01L27/0623 ,  H01L21/82285 ,  H01L21/8249 ,  H01L27/0826

    摘要： Complementary bipolar semiconductor device (Cbi semiconductor device) with a substrate of a first conductivity type, active bipolar transistor regions in the substrate in which the base, emitter, and collector of vertical bipolar transistors are arranged; vertical epitaxial base npn bipolar transistors in a first subset of the active bipolar transistor regions; vertical epitaxial base pnp bipolar transistors in a second subset of the active bipolar transistor regions; collector contact regions which are each arranged bordering on an active bipolar transistor region; and flat field isolation regions which each laterally bound the active bipolar transistor regions and the collector contact regions. A flat field isolation region of a first type with a first extended depth in the direction of the substrate interior is arranged between the first or the second or both the first and the second subset of active bipolar transistor regions on one side and the adjacent collector contact regions on the other, and flat field isolation areas of a second type, with a second extended depth larger than the first, bound the active bipolar transistor regions and the collector contact regions, viewed in cross section, on the sides thereof facing away from each other.

    VERTIKALER BIPOLARTRANSISTOR UND VERFAHREN ZU SEINER HERSTELLUNG
    8.
    发明授权
    VERTIKALER BIPOLARTRANSISTOR UND VERFAHREN ZU SEINER HERSTELLUNG 有权
    用于制造垂直双极晶体管AND PROCESS

    公开(公告)号：EP1112594B1

    公开(公告)日：2010-12-01

    申请号：EP99968740.3

    申请日：1999-09-08

    申请人： IHP GmbH-Innovations for High Performance Microelectronics / Leibniz-Institut für innovative Mikroelektronik

    发明人： EHWALD, Karl-Ernst ,  KNOLL, Dieter ,  HEINEMANN, Bernd

    IPC分类号： H01L29/732 ,  H01L29/737 ,  H01L29/10 ,  H01L21/331

    CPC分类号： H01L29/66242 ,  H01L21/8249 ,  H01L29/0821 ,  H01L29/7378

    摘要： The invention relates to a vertical bipolar transistor and a method for the production thereof. The aim of the invention is to produce a vertical bipolar transistor and to disclose a method for the production thereof, whereby excellent high frequency properties can be obtained for said transistor using the simplest possible production technology involving an implanted epitaxy-free collector and only one polysilicon layer spread over a large surface and which can be easily integrated into a conventional mainstream CMOS process without epitaxially produced trough areas. It is possible to simplify technology, while at the same time improving the high frequency parameters of vertical bipolar transistors by reducing the parasitic lateral and vertical components of the resistance of the collector, by means of a self-adjusting transistor construction in conjunction with a special method of production, whereby a highly doped monocrystalline base connection area surrounding the active base in a ring-like manner is removed in the region of the collector connection by reactive ion etching, together with the underlying less doped area of the collector or a part thereof.