VERTIKALER BIPOLARTRANSISTOR
    1.
    发明授权
    VERTIKALER BIPOLARTRANSISTOR 有权
    垂直双极型晶体管

    公开(公告)号:EP1825504B1

    公开(公告)日:2012-03-28

    申请号:EP05825275.0

    申请日:2005-12-12

    摘要: The invention relates to a vertical heterobipolar transistor, comprising a substrate made from a semiconductor material of a first conductance type and an insulation region embodied therein, a first semiconductor electrode, arranged in an opening in the insulation layer, made from a single-crystal semiconductor material of a second conductance type, embodied either as collector or emitter, which has a first vertical section and a second adjacent vertical section further away from the substrate interior in a vertical direction, whereby only the first vertical section is enclosed by the insulation region in lateral directions perpendicular to the vertical direction, a second semiconductor electrode, made from semiconductor material of the second conductance type, which, when the other type of semiconductor electrode is embodied as emitter, is alternatively embodied as collector and vice versa, a base made from a single crystal semiconductor material of the first conductance type between the collector and the emitter and a base connector region, comprising a single crystal section which laterally surrounds the second vertical section of the first semiconductor electrode, lying further towards the substrate interior as viewed in the lateral direction from the base and resting with the underside thereof directly on the insulation layer.

    CMOS-KOMPATIBLER LATERALER DMOS-TRANSISTOR
    2.
    发明授权
    CMOS-KOMPATIBLER LATERALER DMOS-TRANSISTOR 有权
    CMOS兼容的横向DMOS晶体管

    公开(公告)号:EP1273043B1

    公开(公告)日:2011-06-22

    申请号:EP01927619.5

    申请日:2001-03-24

    摘要: The invention relates to a CMOS-compatible lateral DMOS transistor and to a method for producing such a transistor. The aim of the invention is to provide a CMOS-compatible DMOS transistor that can be optionally designed for very high drain voltages or for the power amplification at very high frequencies by choosing the appropriate layout and that can be produced with little additional technical effort as compared to the conventional sub-νm production technology for CMOS circuits. To this end, a gate insulator of the inventive CMOS-compatible lateral DMOS transistor has a uniform thickness across the entire current-carrying (active) zone below a control gate. Below said control gate, a surface-near zone with increased dopant concentration (well region) that determines the transistor threshold voltage is disposed in such a manner that it occupies the entire area below the control gate disposed in the active zone and that it terminates within a so-called drift region between the control gate and a highly-doped drain region. The entire surface of the drift region is covered by a zone having the conductivity type of the drain region (VLDD) and being poorly doped as compared to the highly doped drain region.

    BIPOLARTRANSISTOR UND VERFAHREN ZU SEINER HERSTELLUNG
    5.
    发明授权
    BIPOLARTRANSISTOR UND VERFAHREN ZU SEINER HERSTELLUNG 有权
    双极晶体管及其制造方法

    公开(公告)号:EP1116278B1

    公开(公告)日:2012-06-13

    申请号:EP99955792.9

    申请日:1999-09-20

    摘要: The invention relates to a bipolar transistor and a method for producing same. The aim of the invention is to provide a bipolar transistor and a method for producing same, which during the use of a single-process poly-silicon technology with differential epitaxis for the production of bases overcomes the disadvantages of conventional systems, so as notably further to improve the high-speed properties of a bipolar transistor, provide the most conductive connections possible between the metal contacts and the active (internal) transistor region as well as a minimized passive transistor surface, while at the same time avoiding greater process complexity and increased contact resistances. To this end a surface relief is produced in the active emitter region by a wet-chemical process. A single-process poly-silicon bipolar transistor having a base produced by epitaxis in accordance with the invention permits a reduction in external base resistance without causing a deterioration in emitter properties. Because the internal and external base regions are deposited continuously no interface problems arise during connection of the base. Base-collector capacity can also be lowered.

    KOMPLEMENTÄRE BIPOLAR-HALBLEITERVORRICHTUNG UND HERSTELLUNGSVERFAHREN
    6.
    发明授权
    KOMPLEMENTÄRE BIPOLAR-HALBLEITERVORRICHTUNG UND HERSTELLUNGSVERFAHREN 有权
    互补双极型半导体装置及方法

    公开(公告)号:EP2100330B1

    公开(公告)日:2012-03-07

    申请号:EP07847998.7

    申请日:2007-12-07

    摘要: Complementary bipolar semiconductor device (Cbi semiconductor device) with a substrate of a first conductivity type, active bipolar transistor regions in the substrate in which the base, emitter, and collector of vertical bipolar transistors are arranged; vertical epitaxial base npn bipolar transistors in a first subset of the active bipolar transistor regions; vertical epitaxial base pnp bipolar transistors in a second subset of the active bipolar transistor regions; collector contact regions which are each arranged bordering on an active bipolar transistor region; and flat field isolation regions which each laterally bound the active bipolar transistor regions and the collector contact regions. A flat field isolation region of a first type with a first extended depth in the direction of the substrate interior is arranged between the first or the second or both the first and the second subset of active bipolar transistor regions on one side and the adjacent collector contact regions on the other, and flat field isolation areas of a second type, with a second extended depth larger than the first, bound the active bipolar transistor regions and the collector contact regions, viewed in cross section, on the sides thereof facing away from each other.

    VERTIKALER BIPOLARTRANSISTOR UND VERFAHREN ZU SEINER HERSTELLUNG
    7.
    发明授权
    VERTIKALER BIPOLARTRANSISTOR UND VERFAHREN ZU SEINER HERSTELLUNG 有权
    用于制造垂直双极晶体管AND PROCESS

    公开(公告)号:EP1112594B1

    公开(公告)日:2010-12-01

    申请号:EP99968740.3

    申请日:1999-09-08

    摘要: The invention relates to a vertical bipolar transistor and a method for the production thereof. The aim of the invention is to produce a vertical bipolar transistor and to disclose a method for the production thereof, whereby excellent high frequency properties can be obtained for said transistor using the simplest possible production technology involving an implanted epitaxy-free collector and only one polysilicon layer spread over a large surface and which can be easily integrated into a conventional mainstream CMOS process without epitaxially produced trough areas. It is possible to simplify technology, while at the same time improving the high frequency parameters of vertical bipolar transistors by reducing the parasitic lateral and vertical components of the resistance of the collector, by means of a self-adjusting transistor construction in conjunction with a special method of production, whereby a highly doped monocrystalline base connection area surrounding the active base in a ring-like manner is removed in the region of the collector connection by reactive ion etching, together with the underlying less doped area of the collector or a part thereof.

    BIPOLARTRANSISTOR UND VERFAHREN ZU SEINER HERSTELLUNG
    9.
    发明授权
    BIPOLARTRANSISTOR UND VERFAHREN ZU SEINER HERSTELLUNG 有权
    双极晶体管及其制造方法

    公开(公告)号:EP1118124B1

    公开(公告)日:2010-12-01

    申请号:EP99955791.1

    申请日:1999-09-20

    IPC分类号: H01L29/732 H01L21/331

    CPC分类号: H01L29/66287 H01L29/7322

    摘要: The invention relates to a bipolar transistor and a method for producing same. The aim of the invention is to provide a bipolar transistor and a method for producing same, which during the use of a single-process poly-silicon technology with differential epitaxis for the production of bases overcomes the disadvantages of conventional systems, so as notably further to improve the high-speed properties of a bipolar transistor, provide highly conductive connections between the metal contacts and the active (internal) transistor region and a minimized passive transistor surface while at the same time avoiding greater process complexity and increased contact resistances. To this end, by creating suitable epitaxis conditions a poly-silicon layer is deposited on the insulating area which is thicker than the epitaxis layer in the active transistor area. The greater thickness of the poly-silicon layer in relation to the epitaxis layer is achieved through the use of a very low temperature for the deposition of part or all of the buffer layer. Th use of a very low deposition temperature results in improved seeding of the insulating layer and a reduction in the deposition dead time, which makes it possible to produce a thicker layer on the insulating layer than in the active transistor area.