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1.发明公开
公开(公告)号：EP0188893A2
公开(公告)日：1986-07-30
申请号：EP85309171.8
申请日：1985-12-16
IPC分类号： H01L33/00 , H01L21/306
CPC分类号： H01L21/3083 , H01L21/30612 , H01L33/0062 , H01S5/2081 , H01S5/2201 , H01S5/227 , H01S5/2275 , Y10S148/095
摘要： A method of fabricating a semiconductor crystal mesa stripe whose waist section is narrower than the upper plane of said mesa stripe, said method comprising the steps of forming a first striped mask (41) on a semiconductor wafer (40) in order to fabricate a prescribed mesa stripe (43), linearly arranging a plurality of second striped masks (42 1 , 42 2 ), narrower than said first striped mask (41) by the prescribed waist width of the main mesa stripe (43), on said semiconductor wafer (40) at prescribed intervals and in parallel with said first striped mask (41) in order to fabricate monitor mesa stripes (44 1 , 44 2 ); and of subjecting said semiconductor wafer (40) to mesa etching.
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公开(公告)号：EP0260909B1
公开(公告)日：1992-11-19
申请号：EP87308096.4
申请日：1987-09-14
发明人： Kinoshita, Jun'ichi c/o Patent Division , Morinaga, Motoyasu c/o Patent Division , Furuyama, Hideto c/o Patent Division , Hirayama, Yuzo c/o Patent Division
CPC分类号： H01S5/227 , H01S5/2277 , Y10S148/05 , Y10S148/051 , Y10S148/066 , Y10S148/095 , Y10T29/413
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公开(公告)号：EP0188893B1
公开(公告)日：1991-06-19
申请号：EP85309171.8
申请日：1985-12-16
IPC分类号： H01L33/00 , H01L21/306
CPC分类号： H01L21/3083 , H01L21/30612 , H01L33/0062 , H01S5/2081 , H01S5/2201 , H01S5/227 , H01S5/2275 , Y10S148/095
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4.发明公开Semiconductor light-emitting device and method of manufacturing the same 失效Licht emittierende Halbleitervorrichtung und Verfahren zu deren Herstellung。
公开(公告)号：EP0260909A2
公开(公告)日：1988-03-23
申请号：EP87308096.4
申请日：1987-09-14
发明人： Kinoshita, Jun'ichi c/o Patent Division , Morinaga, Motoyasu c/o Patent Division , Furuyama, Hideto c/o Patent Division , Hirayama, Yuzo c/o Patent Division
CPC分类号： H01S5/227 , H01S5/2277 , Y10S148/05 , Y10S148/051 , Y10S148/066 , Y10S148/095 , Y10T29/413
摘要： An active layer is formed on an n-type InP buffer layer (11) of a substrate (10). A pair of strip-shaped grooves are formed into the active layer to divide it into a contract portion (12a) and side portions. A p-type InP cladding layer (15) is deposited on the entire surface of the active layer and grooves. The cladding layer (15) is selectively etched to form a mesa portion including the central active portion (12a) and expose the buffer layer (11). An insulating film (18) is coated on the mesa portion and buffer layer, so that a semiconductor light-emitting device is manufactured.
摘要翻译： 在衬底（10）的n型InP缓冲层（11）上形成有源层。 一对带状槽形成有源层，以将其分成收缩部分（12a）和侧部分。 p型InP包覆层（15）沉积在有源层和沟槽的整个表面上。 选择性地蚀刻包覆层（15）以形成包括中心活性部分（12a）并暴露缓冲层（11）的台面部分。 绝缘膜（18）被涂覆在台面部分和缓冲层上，从而制造半导体发光器件。
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公开(公告)号：EP0233725A2
公开(公告)日：1987-08-26
申请号：EP87300903.9
申请日：1987-02-02
发明人： Kinoshita, Jun'ichi c/o Patent Division , Suzuki, Nobuo c/o Patent Division , Morinaga, Motoyasu c/o Patent Division , Hirayama, Yuzo c/o Patent Division , Nakamura, Masaru c/o Patent Division
IPC分类号： H01L29/80 , H01L27/15 , H01L33/00 , H01S3/19 , H01L21/28 , H01L21/306 , H01L21/82 , H01L21/76
CPC分类号： H01S5/0422 , H01L21/30612 , H01L21/8252 , H01L27/15 , H01L29/812 , H01L33/0062 , H01S5/0208 , H01S5/0261 , H01S5/06203 , H01S5/20 , H01S5/32391 , Y10S148/053 , Y10S148/095 , Y10S148/119
摘要： In a monolithic OEIC in which an FET (Q1) and a light-emitting device (LD) are integrated, the light-emitting device (LD) has a first clad layer (14), an active layer (15,), and a second clad layer (17) stacked on a substrate (11), the FET (Q1) has a channel layer (12) and source and drain layers (14 2 , 14 3 ) with a high impurity concentration stacked on the substrate (11), etching mask layers (15 2 , 15 3 ) on the source and drain layers (14 2 , 14 3 ), and a gate electrode (22) formed on a channel layer (12) between source and drain electrodes (21 1 , 21 2 ) and the source and drain layers (14 2 , 14 3 ), the first clad layer (14 1 ) of the light-emitting diode (LD) and the source and drain layers (14 2 , 14 3 ) with a high impurity concentration of the FET (Q 1 ) are formed of the same semiconductor layer, and an active layer (15 1 ) of the light-emitting device (LD) and the etching mask layers (15 2 , 15 3 ) of the FET (Q1) are formed of the same semiconductor layer.
摘要翻译： 在集成了FET（Q1）和发光元件（LD）的单片式OEIC中，发光元件（LD）具有第一包覆层（14），活性层（15）和 （11）上堆叠的第二覆盖层（17），FET（Q1）具有沟道层（12）和堆叠在衬底（11）上的具有高杂质浓度的源极和漏极层（142,143） 在源极和漏极层（142,143）上的掩模层（152,153）以及在源极和漏极电极（211,212）与源极和漏极层之间的沟道层（12）上形成的栅极电极（22） （142,143），发光二极管（LD）的第一覆盖层（141）和FET（Q1）的高杂质浓度的源极和漏极层（142,143）由相同的半导体 层，并且发光器件（LD）的有源层（151）和FET（Q1）的蚀刻掩模层（152,153）由相同的半导体层形成。
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公开(公告)号：EP0233725B1
公开(公告)日：1995-04-19
申请号：EP87300903.9
申请日：1987-02-02
发明人： Kinoshita, Jun'ichi c/o Patent Division , Suzuki, Nobuo c/o Patent Division , Morinaga, Motoyasu c/o Patent Division , Hirayama, Yuzo c/o Patent Division , Nakamura, Masaru c/o Patent Division
IPC分类号： H01L29/80 , H01L27/15 , H01L33/00 , H01S3/19 , H01L21/28 , H01L21/306 , H01L21/82 , H01L21/76
CPC分类号： H01S5/0422 , H01L21/30612 , H01L21/8252 , H01L27/15 , H01L29/812 , H01L33/0062 , H01S5/0208 , H01S5/0261 , H01S5/06203 , H01S5/20 , H01S5/32391 , Y10S148/053 , Y10S148/095 , Y10S148/119
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公开(公告)号：EP0293185B1
公开(公告)日：1994-02-02
申请号：EP88304737.5
申请日：1988-05-25
发明人： Morinaga, Motoyasu c/o Patent Division , Furuyama, Hideto c/o Patent Division , Nakamura, Masaru c/o Patent Division , Suzuki, Nobuo c/o Patent Division , Hirayama, Yuzo c/o Patent Division , Okuda, Hajime c/o Patent Division
CPC分类号： H01S5/026 , H01S5/0208 , H01S5/0422 , H01S5/0425 , H01S5/227 , H01S5/2275 , H01S5/2277 , H01S5/32391
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公开(公告)号：EP0293185A3
公开(公告)日：1989-04-12
申请号：EP88304737.5
申请日：1988-05-25
发明人： Morinaga, Motoyasu c/o Patent Division , Furuyama, Hideto c/o Patent Division , Nakamura, Masaru c/o Patent Division , Suzuki, Nobuo c/o Patent Division , Hirayama, Yuzo c/o Patent Division , Okuda, Hajime c/o Patent Division
CPC分类号： H01S5/026 , H01S5/0208 , H01S5/0422 , H01S5/0425 , H01S5/227 , H01S5/2275 , H01S5/2277 , H01S5/32391
摘要： A semiconductor laser device comprises a substrate (10) having an n-type buffer layer (11), a semiconductor laser element and auxiliary element, provided side by side on the buffer layer. The semiconductor laser element includes a mesa portion having a p-type low resistant semiconductor region (13c) provided above the buffer layer, an active region (12a) consisting of a semiconductor formed on the buffer layer and low resistant region, a pair of buried portions (13a) integrally formed with the low resistive sregion and formed on and contiguous to opposite sides of the active region in the width direction. A lateral hole (35) is provided between the buffer layer and low sresistive region on the side of buried portion. The auxiliary element includes a high resistive regions (13d) integrally formed with the low resistant region and positioned on the sides of low resistive region.
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9.发明公开Semiconductor laser device and method for manufacturing the same 失效Halbleiterlaservorrichtung und Verfahren zu ihrer Herstellung。
公开(公告)号：EP0293185A2
公开(公告)日：1988-11-30
申请号：EP88304737.5
申请日：1988-05-25
发明人： Morinaga, Motoyasu c/o Patent Division , Furuyama, Hideto c/o Patent Division , Nakamura, Masaru c/o Patent Division , Suzuki, Nobuo c/o Patent Division , Hirayama, Yuzo c/o Patent Division , Okuda, Hajime c/o Patent Division
CPC分类号： H01S5/026 , H01S5/0208 , H01S5/0422 , H01S5/0425 , H01S5/227 , H01S5/2275 , H01S5/2277 , H01S5/32391
摘要： A semiconductor laser device comprises a substrate (10) having an n-type buffer layer (11), a semiconductor laser element and auxiliary element, provided side by side on the buffer layer. The semiconductor laser element includes a mesa portion having a p-type low resistant semiconductor region (13c) provided above the buffer layer, an active region (12a) consisting of a semiconductor formed on the buffer layer and low resistant region, a pair of buried portions (13a) integrally formed with the low resistive sregion and formed on and contiguous to opposite sides of the active region in the width direction. A lateral hole (35) is provided between the buffer layer and low sresistive region on the side of buried portion. The auxiliary element includes a high resistive regions (13d) integrally formed with the low resistant region and positioned on the sides of low resistive region.
摘要翻译： 半导体激光装置包括在缓冲层上并排设置的具有n型缓冲层（11），半导体激光元件和辅助元件的衬底（10）。 半导体激光元件包括具有设置在缓冲层上方的p型低电阻半导体区域（13c）的台面部分，由缓冲层上形成的半导体和低电阻区域构成的有源区域（12a），一对埋入 与低电阻区域整体形成并形成在有源区域的宽度方向的相对侧上且与其邻接的部分（13a）。 横向孔（35）设置在缓冲层和掩埋部分侧的低阻力区域之间。 辅助元件包括与低电阻区域整体形成并位于低电阻区域侧面的高电阻区域（13d）。
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